Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors

Memory stalls are a significant source of performance degradation in modern processors. Data prefetching is a widely adopted and well studied technique used to alleviate this problem. Prefetching can be performed by the hardware, or be initiated and controlled by software. Among software controlled...

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Veröffentlicht in:	International journal of parallel programming Jg. 45; H. 3; S. 530 - 550
Hauptverfasser:	Garcia, Victor, Rico, Alejandro, Villavieja, Carlos, Carpenter, Paul, Navarro, Nacho, Ramirez, Alex
Format:	Journal Article Verlag
Sprache:	Englisch
Veröffentlicht:	New York Springer US 01.06.2017 Springer Nature B.V
Schlagworte:	Analysis Arquitectura de computadors Benchmarks Cache Cache memories Cache memory Central processing units Computer programming Computer programs Computer Science CPUs Dynamical systems Engine blocks Engines Gestió de memòria (Informàtica) Hardware Informàtica Memòria cau Prefetch Processor Architectures Schedules Software Software Engineering/Programming and Operating Systems Stall Studies Task based programming models Theory of Computation Àrees temàtiques de la UPC Prefetch Cache memories Task based programming models
ISSN:	0885-7458, 1573-7640
Online-Zugang:	Volltext
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