A Scalable and Modular Architecture for High-Performance Packet Classification

Packet classification is widely used as a core function for various applications in network infrastructure. With increasing demands in throughput, performing wire-speed packet classification has become challenging. Also the performance of today's packet classification solutions depends on the c...

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Veröffentlicht in:	IEEE transactions on parallel and distributed systems Jg. 25; H. 5; S. 1135 - 1144
Hauptverfasser:	Ganegedara, Thilan, Weirong Jiang, Prasanna, Viktor K.
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.05.2014 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Architecture Architecture (computers) Arrays ASIC Classification Conversion Field programmable gate arrays firewall FPGA Hardware hardware architectures High speed Memory management Modular network security networking Packet classification Pipelines Product introduction router State of the art Throughput Vectors
ISSN:	1045-9219, 1558-2183
Online-Zugang:	Volltext
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