A New Automated Design Method Based on Machine Learning for CMOS Analog Circuits

A new simulation based automated CMOS analog circuit design method which applies a multi-objective non-Darwinian-type evolutionary algorithm based on Learnable Evolution Model (LEM) is proposed in this article. The multi-objective property of this automated design of CMOS analog circuits is governed...

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Veröffentlicht in:International journal of electronics Jg. 103; H. 11; S. 1868 - 1881
Hauptverfasser: Moradi, Behzad, Mirzaei, Abdolreza
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Abingdon Taylor & Francis 01.11.2016
Taylor & Francis LLC
Schlagworte:
Algorithms
Analog circuits
automated design
Automation
Circuit design
Circuits
CMOS
CMOS analogue circuits
Concurrent engineering
Design
Design analysis
Evolution
Evolutionary algorithms
Genetic algorithms
Learnable Evolution Model
multi-objective
operational amplifier
ISSN:0020-7217, 1362-3060
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Zusammenfassung:A new simulation based automated CMOS analog circuit design method which applies a multi-objective non-Darwinian-type evolutionary algorithm based on Learnable Evolution Model (LEM) is proposed in this article. The multi-objective property of this automated design of CMOS analog circuits is governed by a modified Strength Pareto Evolutionary Algorithm (SPEA) incorporated in the LEM algorithm presented here. LEM includes a machine learning method such as the decision trees that makes a distinction between high- and low-fitness areas in the design space. The learning process can detect the right directions of the evolution and lead to high steps in the evolution of the individuals. The learning phase shortens the evolution process and makes remarkable reduction in the number of individual evaluations. The expert designer's knowledge on circuit is applied in the design process in order to reduce the design space as well as the design time. The circuit evaluation is made by HSPICE simulator. In order to improve the design accuracy, bsim3v3 CMOS transistor model is adopted in this proposed design method. This proposed design method is tested on three different operational amplifier circuits. The performance of this proposed design method is verified by comparing it with the evolutionary strategy algorithm and other similar methods.
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ISSN:0020-7217
1362-3060
DOI:10.1080/00207217.2016.1138538