Two-Bit Bit Flipping Algorithms for LDPC Codes and Collective Error Correction

A new class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel is proposed. Compared to the regular (parallel or serial) bit flipping algorithms, the proposed algorithms employ one additional bit at a variable node to represent its "strength." T...

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Bibliographic Details
Published in:IEEE transactions on communications Vol. 62; no. 4; pp. 1153 - 1163
Main Authors: Dung Viet Nguyen, Vasic, Bane
Format: Journal Article
Language:English
Published: New York, NY IEEE 01.04.2014
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Algorithm design and analysis
Algorithms
Applied sciences
Bit flipping algorithms
Channels
Charge carrier processes
Codes
Coding, codes
Decoding
Error correcting codes
Error correction
Error correction codes
error floor
Exact sciences and technology
High speed
Information, signal and communications theory
Iterative decoding
low-density parity-check codes
Parity check codes
Serials
Signal and communications theory
Telecommunications and information theory
Trapping
trapping set
Bit flipping
Binary channel
Bit flipping algorithms
error floor
Tanner graph
Decoding
Algorithm
Failures
Trapping
Failure analysis
Recursive method
Error correcting code
Parity check codes
Error correction
low-density parity-check codes
trapping set
ISSN:0090-6778, 1558-0857
Online Access:Get full text
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Summary:A new class of bit flipping algorithms for low-density parity-check codes over the binary symmetric channel is proposed. Compared to the regular (parallel or serial) bit flipping algorithms, the proposed algorithms employ one additional bit at a variable node to represent its "strength." The introduction of this additional bit allows an increase in the guaranteed error correction capability. An additional bit is also employed at a check node to capture information which is beneficial to decoding. A framework for failure analysis and selection of two-bit bit flipping algorithms is provided. The main component of this framework is the (re)definition of trapping sets, which are the most "compact" Tanner graphs that cause decoding failures of an algorithm. A recursive procedure to enumerate trapping sets is described. This procedure is the basis for selecting a collection of algorithms that work well together. It is demonstrated that decoders which employ a properly selected group of the proposed algorithms operating in parallel can offer high speed and low error floor decoding.
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ISSN:0090-6778
1558-0857
DOI:10.1109/TCOMM.2014.021614.130884