An Application Specific Instruction Set Processor (ASIP) for Adaptive Filters in Neural Prosthetics

Neural coding is an essential process for neuroprosthetic design, in which adaptive filters have been widely utilized. In a practical application, it is needed to switch between different filters, which could be based on continuous observations or point process, when the neuron models, conditions, o...

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Vydané v:	IEEE/ACM transactions on computational biology and bioinformatics Ročník 12; číslo 5; s. 1034 - 1047
Hlavní autori:	Yao Xin, Li, Will X. Y., Zhaorui Zhang, Cheung, Ray C. C., Dong Song, Berger, Theodore W.
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	United States IEEE 01.09.2015 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Action Potentials - physiology Adaptation models adaptive filter Adaptive filters Algorithms application specific instruction set processor Brain - physiology Brain Mapping - instrumentation Brain models Brain-Computer Interfaces Coding Computation Computational efficiency Computer architecture Design engineering Electroencephalography - instrumentation Encoding Equipment Design Equipment Failure Analysis field-programmable gate array Flexibility Hardware Humans Microprocessors neural coding Neural Prostheses Neurons neuroprosthetics Reproducibility of Results Sensitivity and Specificity Signal Processing, Computer-Assisted - instrumentation Switches Neuroprosthetics application specific instruction set processor adaptive filter field-programmable gate array neural coding
ISSN:	1545-5963, 1557-9964
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Popis
Shrnutí:	Neural coding is an essential process for neuroprosthetic design, in which adaptive filters have been widely utilized. In a practical application, it is needed to switch between different filters, which could be based on continuous observations or point process, when the neuron models, conditions, or system requirements have changed. As candidates of coding chip for neural prostheses, low-power general purpose processors are not computationally efficient especially for large scale neural population coding. Application specific integrated circuits (ASICs) do not have flexibility to switch between different adaptive filters while the cost for design and fabrication is formidable. In this research work, we explore an application specific instruction set processor (ASIP) for adaptive filters in neural decoding activity. The proposed architecture focuses on efficient computation for the most time-consuming matrix/vector operations among commonly used adaptive filters, being able to provide both flexibility and throughput. Evaluation and implementation results are provided to demonstrate that the proposed ASIP design is area-efficient while being competitive to commercial CPUs in computational performance.
Bibliografia:	ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 content type line 23
ISSN:	1545-5963 1557-9964
DOI:	10.1109/TCBB.2015.2440248