ASIC Implementation of Soft-Input Soft-Output MIMO Detection Using MMSE Parallel Interference Cancellation

Multiple-input multiple-output (MIMO) technology is the key to meet the demands for data rate and link reliability of modern wireless communication systems, such as IEEE 802.11n or 3GPP-LTE. The full potential of MIMO systems can, however, only be achieved by means iterative MIMO decoding relying on...

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Veröffentlicht in:IEEE journal of solid-state circuits Jg. 46; H. 7; S. 1754 - 1765
Hauptverfasser: Studer, C., Fateh, S., Seethaler, D.
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York IEEE 01.07.2011
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:
Algorithms
Application specific integrated circuits
Cancellation
Decoding
Demand
Detectors
Error detection
Interference
Iterative decoding
Iterative detection and decoding
MIMO
minimum mean-square error (MMSE)
multiple-input multiple-output (MIMO)
parallel interference cancellation (PIC)
Preprocessing
Signal to noise ratio
soft-input soft-output (SISO)
spatial multiplexing
Throughput
Very large scale integration
very-large scale integration (VLSI)
wireless communication
Wireless communications
ISSN:0018-9200, 1558-173X
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Zusammenfassung:Multiple-input multiple-output (MIMO) technology is the key to meet the demands for data rate and link reliability of modern wireless communication systems, such as IEEE 802.11n or 3GPP-LTE. The full potential of MIMO systems can, however, only be achieved by means iterative MIMO decoding relying on soft-input soft-output (SISO) data detection. In this paper, we describe the first ASIC implementation of a SISO detector for iterative MIMO decoding. To this end, we propose a low-complexity minimum mean-squared error (MMSE) based parallel interference cancellation algorithm, develop a suitable VLSI architecture, and present a corresponding four-stream 1.5 mm 2 detector chip in 90 nm CMOS technology. The fabricated ASIC includes all necessary preprocessing circuitry and exceeds the 600 Mb/s peak data-rate of IEEE 802.11n. A comparison with state-of-the-art MIMO-detector implementations demonstrates the performance benefits of our ASIC prototype in practical system-scenarios.
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ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2011.2144470