Memory-Efficient Fixed-Length Representation of Synchronous Event Frames for Very-Low-Power Chip Integration

The new event cameras are now widely used in many computer vision applications. Their high raw data bitrate levels require a more efficient fixed-length representation for low-bandwidth transmission from the event sensor to the processing chip. A novel low-complexity lossless compression framework i...

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Veröffentlicht in:Electronics (Basel) Jg. 12; H. 10; S. 2302
Hauptverfasser: Schiopu, Ionut, Bilcu, Radu Ciprian
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Basel MDPI AG 19.05.2023
Schlagworte:
Cameras
Codec
Coding
Complexity
Compression ratio
Computer vision
Configurations
Data compression
Design and construction
Energy consumption
Frames (data processing)
Image coding
Image compression
Integrated circuit fabrication
Lookup tables
Machine vision
Methods
Representations
Sensors
Video compression
Finland
ISSN:2079-9292, 2079-9292
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Zusammenfassung:The new event cameras are now widely used in many computer vision applications. Their high raw data bitrate levels require a more efficient fixed-length representation for low-bandwidth transmission from the event sensor to the processing chip. A novel low-complexity lossless compression framework is proposed for encoding the synchronous event frames (EFs) by introducing a novel memory-efficient fixed-length representation suitable for hardware implementation in the very-low-power (VLP) event-processing chip. A first contribution proposes an improved representation of the ternary frames using pixel-group frame partitioning and symbol remapping. Another contribution proposes a novel low-complexity memory-efficient fixed-length representation using multi-level lookup tables (LUTs). Complex experimental analysis is performed using a set of group-size configurations. For very-large group-size configurations, an improved representation is proposed using a mask-LUT structure. The experimental evaluation on a public dataset demonstrates that the proposed fixed-length coding framework provides at least two times the compression ratio relative to the raw EF representation and a close performance compared with variable-length video coding standards and variable-length state-of-the-art image codecs for lossless compression of ternary EFs generated at frequencies bellow one KHz. To our knowledge, the paper is the first to introduce a low-complexity memory-efficient fixed-length representation for lossless compression of synchronous EFs, suitable for integration into a VLP event-processing chip.
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ISSN:2079-9292
2079-9292
DOI:10.3390/electronics12102302