Floating-Point Inverse Square Root Algorithm Based on Taylor-Series Expansion

This brief describes a segmented structure to deal with inverse square root in floating-point digital calculation arithmetic, based on Taylor-Series expansion; it uses only the small number of their expansion terms to achieve a fast evaluation of these functions in high precision. Taylor-series expa...

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Vydáno v:IEEE transactions on circuits and systems. II, Express briefs Ročník 68; číslo 7; s. 2640 - 2644
Hlavní autoři: Wei, Jianglin, Kuwana, Anna, Kobayashi, Haruo, Kubo, Kazuyoshi, Tanaka, Yuuki
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York IEEE 01.07.2021
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:
algorithm
Algorithms
Approximation algorithms
Convergence
division
Floating point arithmetic
Floating-point
Hardware
inverse squares root
Mathematical analysis
Numerical simulation
Series (mathematics)
Series expansion
Signal processing algorithms
Table lookup
Taylor series
Taylor-series expansion
ISSN:1549-7747, 1558-3791
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Shrnutí:This brief describes a segmented structure to deal with inverse square root in floating-point digital calculation arithmetic, based on Taylor-Series expansion; it uses only the small number of their expansion terms to achieve a fast evaluation of these functions in high precision. Taylor-series expansions of the inverse square root are examined for several center points with their convergence ranges, and the inverse square root calculation algorithm trade-offs among accuracy, numbers of multiplications/additions/subtractions and LUT sizes are shown; the designer can choose the optimal algorithm for his digital inverse square root calculation, and build its conceptual dedicated hardware architecture design with the contents described here.
Bibliografie:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
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ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2021.3062358