FPGA Implementation of an Improved OMP for Compressive Sensing Reconstruction

This article proposes an improved orthogonal matching pursuit (OMP) algorithm and its implementation with Xilinx Vivado high-level synthesis (HLS). We use the Gram-Schmidt orthogonalization to improve the update process of signal residuals so that the signal recovery only needs to perform the least-...

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Published in:IEEE transactions on very large scale integration (VLSI) systems Vol. 29; no. 2; pp. 259 - 272
Main Authors: Li, Jun, Chow, Paul, Peng, Yuanxi, Jiang, Tian
Format: Journal Article
Language:English
Published: New York IEEE 01.02.2021
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Algorithms
Atomic measurements
Compressed sensing
Compressed sensing (CS)
Field programmable gate arrays
field-programmable gate array (FPGA) implementation
Hardware
Hardware description languages
High level synthesis
Image reconstruction
Matched pursuit
Matching pursuit algorithms
orthogonal matching pursuit (OMP) algorithm
Signal processing
Signal reconstruction
Sparse matrices
sparse signal recovery
Sparsity
Vivado high-level synthesis (HLS)
ISSN:1063-8210, 1557-9999
Online Access:Get full text
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Summary:This article proposes an improved orthogonal matching pursuit (OMP) algorithm and its implementation with Xilinx Vivado high-level synthesis (HLS). We use the Gram-Schmidt orthogonalization to improve the update process of signal residuals so that the signal recovery only needs to perform the least-squares solution once, which greatly reduces the number of matrix operations in a hardware implementation. Simulation results show that our OMP algorithm has the same signal reconstruction accuracy as the original OMP algorithm. Our approach provides a fast and reconfigurable implementation for different signal sizes, different measurement matrix sizes, and different sparsity levels. The proposed design can recover a 128-length signal with measurement number <inline-formula> <tex-math notation="LaTeX">M=32 </tex-math></inline-formula> and sparsity <inline-formula> <tex-math notation="LaTeX">K=5 </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">K=8 </tex-math></inline-formula> in 13.2 and <inline-formula> <tex-math notation="LaTeX">21~\mu \text{s} </tex-math></inline-formula>, which is at least a 21.9% and 22.2% improvement compared with the existing HLS-based works; a 256-length signal with <inline-formula> <tex-math notation="LaTeX">M=64 </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">K=8 </tex-math></inline-formula> in <inline-formula> <tex-math notation="LaTeX">20.6~\mu \text{s} </tex-math></inline-formula>, which is a 24% improvement compared with the existing work; and a 1024-length signal with measurement number <inline-formula> <tex-math notation="LaTeX">M=256 </tex-math></inline-formula> and sparsity <inline-formula> <tex-math notation="LaTeX">K=12 </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">K=36 </tex-math></inline-formula> in 150.3 and <inline-formula> <tex-math notation="LaTeX">423~\mu \text{s} </tex-math></inline-formula>, respectively, which are close to the results of traditional hardware description language (HDL) implementations. Our results show that our improved OMP algorithm not only offers a superior reconstruction time compared with other recent HLS-based works but also can compete with existing works that are implemented using the traditional field-programmable gate array (FPGA) design route.
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ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2020.3030906