Analysis and Design of a Discrete-Time Delta-Sigma Modulator Using a Cascoded Floating-Inverter-Based Dynamic Amplifier

This article presents a delta-sigma modulator (DSM) using a cascoded floating-inverter-based dynamic amplifier. The proposed cascoded dynamic amplifier achieves more than 50-dB dc gain while maintaining an HD3 of better than -110 dBc for signal swings less than <inline-formula> <tex-math no...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 57; no. 11; pp. 3384 - 3395
Main Authors: Kumar, R. S. Ashwin, Krishnapura, Nagendra, Banerjee, Paramita
Format: Journal Article
Language:English
Published: New York IEEE 01.11.2022
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Analog-to-digital converters
Bandwidth
Capacitors
discrete-time delta-sigma modulators (DSMs)
dynamic amplifiers
floating inverter amplifiers (FIAs)
Gain
Inverters
Modulation
Operational amplifiers
Reservoirs
Settling
Transconductance
Transistors
ISSN:0018-9200, 1558-173X
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:This article presents a delta-sigma modulator (DSM) using a cascoded floating-inverter-based dynamic amplifier. The proposed cascoded dynamic amplifier achieves more than 50-dB dc gain while maintaining an HD3 of better than -110 dBc for signal swings less than <inline-formula> <tex-math notation="LaTeX">300~\mathrm {mV_{ppd}} </tex-math></inline-formula>. Compared to the previously reported two-stage floating inverter amplifier (FIA), the cascoded FIA has a lower and a process invariant input-referred noise, making it an ideal choice for high-resolution ADCs. We also show that, when such a single-stage dynamic amplifier, which has a time-varying transconductance, is used in closed-loop switched-capacitor circuits, the settling bandwidth depends on the average transconductance <inline-formula> <tex-math notation="LaTeX">G_{m,\rm avg} </tex-math></inline-formula> during the settling interval. A detailed analysis reveals that, when the floating inverter structure operates in weak inversion for most of the time (which is the power-efficient way to bias the amplifier), this average transconductance depends strongly on the reservoir capacitance value and only weakly on the transistor dimensions. Besides, it is less sensitive to temperature variations, unlike the transconductance of a conventional OTA biased in weak inversion. We also quantitatively derive and show that the cascoded FIA is more power-efficient than a conventional static-current biased operational transconductance amplifier. Using the cascoded FIA, a discrete-time DSM has been designed and fabricated in a 180-nm CMOS process. The modulator runs at 3.072 MHz while consuming 189 <inline-formula> <tex-math notation="LaTeX">\mu \text{A} </tex-math></inline-formula> from a 1.8-V supply. In a bandwidth of 24 kHz, the measured SNR/SNDR/SFDR is 96.4/96.2/114 dB, respectively.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2022.3171790