Automatic Processor Customization for Zero-Overhead Online Software Verification

The PSL-to-Verilog (P2V) compiler can translate a set of assertions about a block-structured software program into a hardware design to be executed concurrently with the program. The assertions validate the correctness of the software program without altering the program's temporal behavior in...

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Vydáno v:IEEE transactions on very large scale integration (VLSI) systems Ročník 16; číslo 10; s. 1346 - 1357
Hlavní autoři: Hong Lu, Forin, A.
Médium: Journal Article
Jazyk:angličtina
Vydáno: New York IEEE 01.10.2008
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:
Assertion-based verification
Behavior
Computer programs
Dynamical systems
Dynamics
eMIPS
Field programmable gate arrays
Hardware
Intrusion detection
Microprocessors
monitor
online
Operating systems
Program processors
Program verification (computers)
property specification language (PSL)
PSL-to-Verilog (P2V)
Real time systems
Software
Software debugging
Software systems
Software testing
Specification languages
temporal logic
Verilog
Very large scale integration
ISSN:1063-8210, 1557-9999
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Popis
Shrnutí:The PSL-to-Verilog (P2V) compiler can translate a set of assertions about a block-structured software program into a hardware design to be executed concurrently with the program. The assertions validate the correctness of the software program without altering the program's temporal behavior in any way, a result never previously achieved by any online model-checking system. Additionally, the techniques and implementations described apply to any general purpose program and the absence of execution overhead renders the system ideal for the verification and debugging of real-time systems. Assertions are expressed in a simple subset of the property specification language (PSL), an IEEE standard originally intended for the behavioral specification of hardware designs. The target execution system is the eMIPS processor, a dynamically self-extensible processor realized with a field-programmable gate array (FPGA). The system can concurrently execute and check multiple programs at a time. Assertions are compiled into eMIPS Extensions, which are loaded by the operating system software into a portion of the FPGA, and discarded once the program terminates. If an assertion is violated, the program receives an exception, otherwise, it executes fully unaware of its verifier. The software program is not modified in any way. It can be compiled separately with full optimizations and executes with or without the corresponding hardware checker. The P2V compiler, implemented in Python, generates code for the implementation of the eMIPS processor running on the Xilinx ML401 development board. It is currently used to verify software properties in areas such as testing, debugging, intrusion detection, and the behavioral verification of concurrent and real-time programs.
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ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2008.2002047