Analysis and Implementation of Multiple-Input, Multiple-Output VBLAST Receiver From Area and Power Efficiency Perspective

This paper presents an analysis of the vertical Bell Laboratories layered space time (VBLAST) receiver used in a multiple-input multiple-output (MIMO) wireless system from the hardware implementation perspective and identifies those processing elements that consume more area and power due to complex...

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Vydané v:IEEE transactions on very large scale integration (VLSI) systems Ročník 14; číslo 11; s. 1281 - 1286
Hlavní autori: Khan, Z., Arslan, T., Thompson, J.S., Erdogan, A.T.
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Piscataway, NJ IEEE 01.11.2006
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:
Applied sciences
Architecture
Bit error rate
Blocking
Channels
Computational complexity
Computer architecture
CORDIC
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Hardware
Integrated circuits
Integrated circuits by function (including memories and processors)
Jacobi rotation
Mathematical models
Mean square error methods
MIMO
minimum mean square error (MMSE)
multiple-input multiple-output (MIMO) wireless system
Nulling
Power system modeling
pseudoinverse
Receivers
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Signal processing algorithms
square root algorithm
Transmitting antennas
vertical Bell Laboratories layered space time (VBLAST)
Very large scale integration
VLSI
Performance evaluation
Fading
MIMO system
minimum mean square error (MMSE)
VLSI circuit
Processor
Scalability
Square root
VLSI
multiple-input multiple-output (MIMO) wireless system
Index Terms-CORDIC
Receiver
pseudoinverse
Space time
Algorithm
Implementation
Mean square error
Jacobi rotation
Circuit architecture
square root algorithm
Integrated circuit
Signal processing
vertical Bell Laboratories layered space time (VBLAST)
ISSN:1063-8210, 1557-9999
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Shrnutí:This paper presents an analysis of the vertical Bell Laboratories layered space time (VBLAST) receiver used in a multiple-input multiple-output (MIMO) wireless system from the hardware implementation perspective and identifies those processing elements that consume more area and power due to complex signal processing. This paper models a scalable VBLAST receiver based on minimum mean square error (MMSE) nulling criteria assuming a block flat fading channel. After identifying the major area and power consuming blocks, this paper proposes two area and power efficient VLSI architectures for the block that computes pseudoinverse of the channel matrix. This paper discusses different tradeoff issues in both architectures and compares them with the architectures in the literature
Bibliografia:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
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ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2006.886403