Lin, H., Lu, Y., Liu, B., & Yang, J. (2008). A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder. IEEE transactions on multimedia, 10(1), 31-42. https://doi.org/10.1109/TMM.2007.911299
Citácia podle Chicago (17th ed.)Lin, Heng-Yao, Ying-Hong Lu, Bin-Da Liu, a Jar-Ferr Yang. "A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder." IEEE Transactions on Multimedia 10, no. 1 (2008): 31-42. https://doi.org/10.1109/TMM.2007.911299.
Citácia podľa MLA (8th ed.)Lin, Heng-Yao, et al. "A Highly Efficient VLSI Architecture for H.264/AVC CAVLC Decoder." IEEE Transactions on Multimedia, vol. 10, no. 1, 2008, pp. 31-42, https://doi.org/10.1109/TMM.2007.911299.
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