SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation

The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication. SpiNNaker - Spiking Neural Network architecture - is a massively parallel computer system designed to provide a cost-effective and flexible simulator for neuroscience e...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 48; no. 8; pp. 1943 - 1953
Main Authors: Painkras, Eustace, Plana, Luis A., Garside, Jim, Temple, Steve, Galluppi, Francesco, Patterson, Cameron, Lester, David R., Brown, Andrew D., Furber, Steve B.
Format: Journal Article Conference Proceeding
Language:English
Published: New York, NY IEEE 01.08.2013
Institute of Electrical and Electronics Engineers
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ISSN:0018-9200, 1558-173X
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Summary:The modelling of large systems of spiking neurons is computationally very demanding in terms of processing power and communication. SpiNNaker - Spiking Neural Network architecture - is a massively parallel computer system designed to provide a cost-effective and flexible simulator for neuroscience experiments. It can model up to a billion neurons and a trillion synapses in biological real time. The basic building block is the SpiNNaker Chip Multiprocessor (CMP), which is a custom-designed globally asynchronous locally synchronous (GALS) system with 18 ARM968 processor nodes residing in synchronous islands, surrounded by a lightweight, packet-switched asynchronous communications infrastructure. In this paper, we review the design requirements for its very demanding target application, the SpiNNaker micro-architecture and its implementation issues. We also evaluate the SpiNNaker CMP, which contains 100 million transistors in a 102-mm 2 die, provides a peak performance of 3.96 GIPS, and has a peak power consumption of 1 W when all processor cores operate at the nominal frequency of 180 MHz. SpiNNaker chips are fully operational and meet their power and performance requirements.
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2013.2259038