Sikka, P., Asati, A. R., & Shekhar, C. (2021). Real time FPGA implementation of a high speed and area optimized Harris corner detection algorithm. Microprocessors and microsystems, 80, 103514. https://doi.org/10.1016/j.micpro.2020.103514
Citace podle Chicago (17th ed.)Sikka, Prateek, Abhijit R. Asati, a Chandra Shekhar. "Real Time FPGA Implementation of a High Speed and Area Optimized Harris Corner Detection Algorithm." Microprocessors and Microsystems 80 (2021): 103514. https://doi.org/10.1016/j.micpro.2020.103514.
Citace podle MLA (9th ed.)Sikka, Prateek, et al. "Real Time FPGA Implementation of a High Speed and Area Optimized Harris Corner Detection Algorithm." Microprocessors and Microsystems, vol. 80, 2021, p. 103514, https://doi.org/10.1016/j.micpro.2020.103514.