Deterministic Parallel Processing

In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArray(TM). The picoArray is a tiled-processor architecture, containing several hundred heterogeneous processors, connected through a novel, compile-time scheduled interconnect. This architectur...

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Bibliographic Details
Published in:International journal of parallel programming Vol. 34; no. 4; pp. 323 - 341
Main Authors: Panesar, Gajinder, Towner, Daniel, Duller, Andrew, Gray, Alan, Robbins, Will
Format: Journal Article
Language:English
Published: New York Springer Nature B.V 01.08.2006
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ISSN:0885-7458, 1573-7640
Online Access:Get full text
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Summary:In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArray(TM). The picoArray is a tiled-processor architecture, containing several hundred heterogeneous processors, connected through a novel, compile-time scheduled interconnect. This architecture does not suffer from many of the problems faced by conventional general purpose parallel processors and provides an alternative to creating an ASIC. The PC102 is the second generation device from picoChip containing 308 processors. The devices are designed to be connected together using a seamless extension of the internal interconnect structure. This enables multi-chip solutions to be easily realised for applications which require additional processing. This paper highlights some of the difficulties encountered when building parallel systems and goes on to show how the features of the picoArray allow deterministic processing to be achieved, how the tool chain allows programming to be performed effectively in a combination of high level assembly language and C, and how systems built around the picoArray are debugged in real-time.
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ISSN:0885-7458
1573-7640
DOI:10.1007/s10766-006-0019-9