Adaptive fault-tolerant architecture and routing algorithm for reliable many-core 3D-NoC systems

During the last few decades, Three-dimensional Network-on-Chips (3D-NoCs) have been showing their advantages against 2D-NoC architectures. This is thanks to the reduced average interconnect length and lower interconnect-power consumption inherited from Three-dimensional Integrated Circuits (3D-ICs)....

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Bibliographic Details
Published in:	Journal of parallel and distributed computing Vol. 93-94; pp. 30 - 43
Main Authors:	Ben Ahmed, Akram, Ben Abdallah, Abderazek
Format:	Journal Article
Language:	English
Published:	Elsevier Inc 01.07.2016
Subjects:	3D NoC Algorithms Architecture Computer networks Deadlock-free Dynamic reconfiguration Fault tolerance Faults Performance degradation Robustness Routing (telecommunications) Three dimensional Robustness Fault-tolerance Architecture Deadlock-free 3D NoC Dynamic reconfiguration
ISSN:	0743-7315, 1096-0848
Online Access:	Get full text
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