Multi-Layer Cryptosystem Using Reversible Cellular Automata

The growing need for adaptable and efficient hardware-based encryption methods has led to increased interest in unconventional models such as cellular automata (CA). This study presents the hardware design and the field programmable gate array (FPGA)-based implementation of a multi-layer symmetric b...

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Bibliographic Details
Published in:Electronics (Basel) Vol. 14; no. 13; p. 2627
Main Authors: Stănică, George, Anghelescu, Petre
Format: Journal Article
Language:English
Published: Basel MDPI AG 01.07.2025
Subjects:
Algorithms
Analysis
Boundary conditions
Cellular automata
Communication
Data encryption
Data encryption chips
Digital integrated circuits
Encryption
Field programmable gate arrays
Hardware
Multilayers
Neighborhoods
Robots
Software
California
ISSN:2079-9292, 2079-9292
Online Access:Get full text
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Summary:The growing need for adaptable and efficient hardware-based encryption methods has led to increased interest in unconventional models such as cellular automata (CA). This study presents the hardware design and the field programmable gate array (FPGA)-based implementation of a multi-layer symmetric block encryption algorithm built on the principles of reversible cellular automata (RCA). The algorithm operates on 128-bit plaintext blocks processed over iterative rounds and integrates five RCA components, each assigned with specific transformation roles to ensure high data diffusion. A 256-bit secret key that governs the rule configuration yields a vast keyspace, significantly enhancing resistance to brute-force attacks. Key elements such as rule-based evolution, neighborhood radius, and hybrid cellular automata for random state generation are also integrated into the hardware logic. All cryptographic components, including initialization, encryption logic, and control, are built exclusively using CA, ensuring design consistency and low complexity. The cryptosystem takes advantage of the localized interactions and naturally parallel CA structure, which align with the architecture of FPGA devices, making them a suitable platform for implementing such encryption schemes. The results demonstrate the feasibility of deploying multi-layer RCA encryption schemes on reconfigurable devices and provide a viable path toward efficient and secure hardware-level encryption systems.
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ISSN:2079-9292
2079-9292
DOI:10.3390/electronics14132627