The complexity of verifying memory coherence and consistency

The problem of testing shared memories for memory coherence and consistency is studied. First, it is proved that detecting violations of coherence in an execution is NP-complete, and it remains NP-complete for a number of restricted instances. This result leads to a proof that all known consistency...

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Veröffentlicht in:	IEEE transactions on parallel and distributed systems Jg. 16; H. 7; S. 663 - 671
Hauptverfasser:	Cantin, J.F., Lipasti, M.H., Smith, J.E.
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.07.2005 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Algorithm design and analysis Circuit testing Coherence design styles error-checking Fault tolerance Hardware memory structures Multiprocessing systems nonnumerical algorithms and problems Processor scheduling reliability Reliability theory Scheduling algorithm sequencing and scheduling shared memory System testing testing theory of computation
ISSN:	1045-9219, 1558-2183
Online-Zugang:	Volltext
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