A new approach to the Population-Based Incremental Learning algorithm using virtual regions for task mapping on NoCs
Network-On-Chip (NoC) platforms were proposed to increase system performance in current and future generations of Multi-Processor System-on-Chip ranging from a few cores to hundreds. For such platforms, efficient mechanisms to perform the mapping of executable tasks are required in order to improve...
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| Veröffentlicht in: | Journal of systems architecture Jg. 97; S. 443 - 454 |
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| Format: | Journal Article |
| Sprache: | Englisch |
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Elsevier B.V
01.08.2019
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| ISSN: | 1383-7621, 1873-6165 |
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| Abstract | Network-On-Chip (NoC) platforms were proposed to increase system performance in current and future generations of Multi-Processor System-on-Chip ranging from a few cores to hundreds. For such platforms, efficient mechanisms to perform the mapping of executable tasks are required in order to improve metrics such as execution time, latency, energy, and others. The Population-Based Incremental Learning (PBIL) algorithm has been used as an optimization technique for the mapping of tasks onto the cores of NoC platforms. However, it does not scale well in terms of latency and other relevant metrics when the size of the platform and the number of tasks are increased. In this work, we propose a new approach, that relies on the PBIL algorithm, for the mapping of tasks called Virtual Regions PBIL (VRPBIL-NoC). This strategy consists of dividing the platform into virtual regions in order to improve the search of quality solutions. We evaluate the performance of our technique by comparing it against a set of heuristic techniques available in the literature, using an extended version of a well-known state-of-the-art simulator called Noxim. The results demonstrated that our approach can deliver better solutions compared to those provided by the other techniques in NoCs for varied configurations. |
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| AbstractList | Network-On-Chip (NoC) platforms were proposed to increase system performance in current and future generations of Multi-Processor System-on-Chip ranging from a few cores to hundreds. For such platforms, efficient mechanisms to perform the mapping of executable tasks are required in order to improve metrics such as execution time, latency, energy, and others. The Population-Based Incremental Learning (PBIL) algorithm has been used as an optimization technique for the mapping of tasks onto the cores of NoC platforms. However, it does not scale well in terms of latency and other relevant metrics when the size of the platform and the number of tasks are increased. In this work, we propose a new approach, that relies on the PBIL algorithm, for the mapping of tasks called Virtual Regions PBIL (VRPBIL-NoC). This strategy consists of dividing the platform into virtual regions in order to improve the search of quality solutions. We evaluate the performance of our technique by comparing it against a set of heuristic techniques available in the literature, using an extended version of a well-known state-of-the-art simulator called Noxim. The results demonstrated that our approach can deliver better solutions compared to those provided by the other techniques in NoCs for varied configurations. |
| Author | Bagherzadeh, N. García Morales, L.G. Aedo Cobo, J.E. |
| Author_xml | – sequence: 1 givenname: L.G. surname: García Morales fullname: García Morales, L.G. email: german.garcia@udea.edu.co organization: Department of Electronic Engineering, University of Antioquia, Medellín, Colombia – sequence: 2 givenname: J.E. surname: Aedo Cobo fullname: Aedo Cobo, J.E. email: jose.aedo@udea.edu.co organization: Department of Electronic Engineering, University of Antioquia, Medellín, Colombia – sequence: 3 givenname: N. surname: Bagherzadeh fullname: Bagherzadeh, N. email: nader@uci.edu organization: Department of Electrical Engineering and Computer Science, University of California, Irvine, USA |
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| Cites_doi | 10.1016/j.procs.2010.04.113 10.1016/j.sysarc.2018.10.001 10.1016/j.sysarc.2015.06.001 10.1016/j.sysarc.2012.10.004 10.1016/j.sysarc.2013.04.009 10.1109/MDT.2010.106 10.1109/TVLSI.2011.2159280 10.1049/iet-cdt.2010.0097 10.1145/2953878 10.1016/j.sysarc.2017.07.004 10.1016/j.sysarc.2017.01.008 10.1016/j.sysarc.2018.08.007 10.1016/j.sysarc.2010.04.007 10.1016/j.sysarc.2017.05.002 |
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| Keywords | Task mapping Multi-Processor system-on-Chip Network-on-Chip Multi-Applications Population-Based Incremental Learning |
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| Title | A new approach to the Population-Based Incremental Learning algorithm using virtual regions for task mapping on NoCs |
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