Evaluation of Binary Decision Diagrams Complexity using Relative Arithmetic Width

Many logic synthesis methods are based on the optimization of reduced order Binary Decision Diagrams (BDDs). The complexity of a BDD greatly depends on the chosen order of variables. Most of the methods find optimal variable ordering focused primarily on some subset of BDD parameters, for example, t...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems Vol. 42; no. 10; p. 1
Main Author: Radmanovic, Milos
Format: Journal Article
Language:English
Published: New York IEEE 01.10.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN:0278-0070, 1937-4151
Online Access:Get full text
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Summary:Many logic synthesis methods are based on the optimization of reduced order Binary Decision Diagrams (BDDs). The complexity of a BDD greatly depends on the chosen order of variables. Most of the methods find optimal variable ordering focused primarily on some subset of BDD parameters, for example, the size, the number of paths, the average path length, etc. In some cases, there is a need for using several parameters for the evaluation of overall BDD complexity. Therefore, this paper proposes a BDD complexity evaluation using the relative arithmetic width parameter. This parameter is calculated as the arithmetic mean of the BDD relative widths over all its levels. The relative arithmetic width expresses the numerical value of the relative shape of the BDD. Experimental results with optimal variable ordering demonstrate the efficiency of the approach.
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ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2023.3239534