Evaluation of Binary Decision Diagrams Complexity using Relative Arithmetic Width

Many logic synthesis methods are based on the optimization of reduced order Binary Decision Diagrams (BDDs). The complexity of a BDD greatly depends on the chosen order of variables. Most of the methods find optimal variable ordering focused primarily on some subset of BDD parameters, for example, t...

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Veröffentlicht in:IEEE transactions on computer-aided design of integrated circuits and systems Jg. 42; H. 10; S. 1
1. Verfasser: Radmanovic, Milos
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York IEEE 01.10.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:
Arithmetic
binary decision diagram
Boolean functions
circuit synthesis
Complexity
Complexity theory
Data structures
Heuristic algorithms
Logic synthesis
Minimization
Optimization
optimization methods
Parameters
Shape
ISSN:0278-0070, 1937-4151
Online-Zugang:Volltext
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Zusammenfassung:Many logic synthesis methods are based on the optimization of reduced order Binary Decision Diagrams (BDDs). The complexity of a BDD greatly depends on the chosen order of variables. Most of the methods find optimal variable ordering focused primarily on some subset of BDD parameters, for example, the size, the number of paths, the average path length, etc. In some cases, there is a need for using several parameters for the evaluation of overall BDD complexity. Therefore, this paper proposes a BDD complexity evaluation using the relative arithmetic width parameter. This parameter is calculated as the arithmetic mean of the BDD relative widths over all its levels. The relative arithmetic width expresses the numerical value of the relative shape of the BDD. Experimental results with optimal variable ordering demonstrate the efficiency of the approach.
Bibliographie:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2023.3239534