Exploiting the Single-Symbol LLR Variation to Accelerate LDPC Decoding for 3-D NAND Flash Memory

Low-density parity-check (LDPC) codes have been widely adopted to guarantee data reliability in 3-D NAND flash memory. However, the iterative LDPC decoding algorithm leads to high decoding latency due to the iterative message transfer mechanism. Using a field-programmable gate array (FPGA) testbed,...

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Bibliographic Details
Published in:IEEE transactions on computer-aided design of integrated circuits and systems Vol. 42; no. 12; p. 1
Main Authors: Li, Yingge, Han, Guojun, Liu, Chang, Zhang, Meng, Wu, Fei
Format: Journal Article
Language:English
Published: New York IEEE 01.12.2023
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
3-D NAND flash memory
Algorithms
binary channel
Bit error rate
Decoding
Error analysis
Error correcting codes
Feedback
Field programmable gate arrays
Flash memories
Flash memory (computers)
Frames
Iterative decoding
LDPC
Likelihood ratio
raw bit error rate
Reliability
single-symbol LLR variation
Symbols
ISSN:0278-0070, 1937-4151
Online Access:Get full text
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Summary:Low-density parity-check (LDPC) codes have been widely adopted to guarantee data reliability in 3-D NAND flash memory. However, the iterative LDPC decoding algorithm leads to high decoding latency due to the iterative message transfer mechanism. Using a field-programmable gate array (FPGA) testbed, we first present the binary channel in NAND flash and analyze the single-symbol log-likelihood ratio (LLR) variation with the decoding iterations. Subsequently, we investigate the raw bit error ratio (RBER) characteristics of intra-page frames. To reduce the number of iterative decoding, we propose a frame feedback information aware decoding algorithm (FFIA-DA), combined with the single-symbol LLR variation and the similar error characteristics among intra-page frames. The proposed method uses the decoding feedback information of one frame to decrease the number of decoding iterations of other frames with similar RBER. Experiments show that the proposed approach can improve the decoding performance of LDPC and speed up decoding convergence.
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ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2023.3297070