NeuroSim: A Circuit-Level Macro Model for Benchmarking Neuro-Inspired Architectures in Online Learning

Neuro-inspired architectures based on synaptic memory arrays have been proposed for on-chip acceleration of weighted sum and weight update in machine/deep learning algorithms. In this paper, we developed NeuroSim, a circuit-level macro model that estimates the area, latency, dynamic energy, and leak...

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Bibliographic Details
Published in:	IEEE transactions on computer-aided design of integrated circuits and systems Vol. 37; no. 12; pp. 3067 - 3080
Main Authors:	Chen, Pai-Yu, Peng, Xiaochen, Yu, Shimeng
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.12.2018 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Algorithm design and analysis Algorithms Artificial neural networks Circuit design Computer architecture Distance learning Emerging nonvolatile memory (eNVM) Integrated circuit modeling Machine learning Microprocessors Multilayer perceptrons neural network (NN) Neural networks neuromorphic computing Neuromorphics offline classification online learning Performance evaluation Performance measurement Static random access memory synaptic devices Weight
ISSN:	0278-0070, 1937-4151
Online Access:	Get full text
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