A High Throughput Acceleration for Hybrid Neural Networks With Efficient Resource Management on FPGA

Deep learning is the amazing technology which has promoted the development of artificial intelligence and achieved many amazing successes in intelligent fields. Convolution-based layers (CLs), fully connected layers (FLs) and recurrent layers (RLs) are three types of layers in classic neural network...

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Vydané v:	IEEE transactions on computer-aided design of integrated circuits and systems Ročník 38; číslo 4; s. 678 - 691
Hlavní autori:	Yin, Shouyi, Tang, Shibin, Lin, Xinhan, Ouyang, Peng, Tu, Fengbin, Liu, Leibo, Wei, Shaojun
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.04.2019 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Acceleration Accelerators Artificial intelligence Bandwidth Convolution Engines Field programmable gate arrays Field-programmable gate array (FPGA)-based accelerators hybrid neural networks (hybrid-NNs) Machine learning Mapping Neural networks Quantization (signal) resource efficient mapping Resource management State of the art
ISSN:	0278-0070, 1937-4151
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