Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays

In this paper, we investigated the technique for improving the reliability of 3-D processor with faults by reconfiguring a 3-D fault-free subarray utilizing as many nonfaulty process elements (PEs) as possible. A novel flexible rerouting scheme is proposed, which makes the PEs can be rerouted or byp...

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Vydané v:	IEEE transactions on computer-aided design of integrated circuits and systems Ročník 39; číslo 1; s. 267 - 271
Hlavní autori:	Qian, Junyan, Ding, Hao, Xiao, Hanpeng, Zhou, Zhide, Zhao, Lingzhong, Zhai, Zhongyi
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.01.2020 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	3-D processor array Algorithms Arrays Circuit faults Fault tolerance Fault tolerant systems Ground penetrating radar Heuristic methods Integrated circuits Logic arrays Microprocessors Reconfiguration rerouting algorithm Switches Three-dimensional displays
ISSN:	0278-0070, 1937-4151
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