Density-Based Spatial Clustering of Applications With Noise (DBSCAN) for Probe Card Production for Advanced Quality Control of Wafer Probing Test

Wafer probing test is crucial for selecting the known good dies via the probe card as the testing signal interface between the tester and the integrated circuits on the fabricated wafers. The consistency of probe cards is critical to ensure the integrity of the testing data. Motivated by realistic n...

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Veröffentlicht in:IEEE transactions on semiconductor manufacturing Jg. 37; H. 4; S. 567 - 575
Hauptverfasser: Chien, Chen-Fu, Suwattananuruk, Butsayarin
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York IEEE 01.11.2024
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:
Cluster analysis
Clustering
Clustering methods
Inspection
Integrated circuits
Integrity
Materials selection
Noise control
PCB selection
Printed circuits
probe card
Probes
Quality control
Semiconductor device manufacture
semiconductor manufacturing
Signal quality
spatial clustering
Spatial data
Supply chains
Wafer probing test
ISSN:0894-6507, 1558-2345
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Zusammenfassung:Wafer probing test is crucial for selecting the known good dies via the probe card as the testing signal interface between the tester and the integrated circuits on the fabricated wafers. The consistency of probe cards is critical to ensure the integrity of the testing data. Motivated by realistic needs, this research aims to develop an effective approach for spatial clustering to select PCB materials while considering Time Domain Reflectometry (TDR) data. To estimate the validity, experiments are conducted with 20 datasets collected in real settings to compare the proposed DBSCAN with three spatial clustering models including Agglomerative Hierarchical Clustering (AHC), K-means, and Spectral Clustering. An empirical study is conducted in a lead semiconductor testing company in Taiwan for validation. The results have shown that the proposed approach can improve the impedance value of material selection by at least 15% for single-signal and 25% for differential signals, respectively. Thus, the proposed solution can effectively reduce intrinsic variance and enhance probing test integrity to reduce both the producer's risk and the customer's risk. Indeed, the developed solution is implemented to enhance virtual vertical integration for the semiconductor supply chain.
Bibliographie:ObjectType-Article-1
SourceType-Scholarly Journals-1
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ISSN:0894-6507
1558-2345
DOI:10.1109/TSM.2024.3468000