Artificial Neural Network-Based Compact Modeling Methodology for Advanced Transistors

The artificial neural network (ANN)-based compact modeling methodology is evaluated in the context of advanced field-effect transistor (FET) modeling for Design-Technology-Cooptimization (DTCO) and pathfinding activities. An ANN model architecture for FETs is introduced, and the results clearly show...

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Bibliographic Details
Published in:	IEEE transactions on electron devices Vol. 68; no. 3; pp. 1318 - 1325
Main Authors:	Wang, Jing, Kim, Yo-Han, Ryu, Jisu, Jeong, Changwook, Choi, Woosung, Kim, Daesin
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.03.2021 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Artificial neural network (ANN) Artificial neural networks circuit simulation compact modeling Data models design-technology-cooptimization (DTCO) Electric potential emerging devices Field effect transistors field-effect transistor (FET) Integrated circuit modeling machine learning Mathematical model Methodology Model accuracy Modelling Neural networks pathfinding Semiconductor device modeling Semiconductor devices SPICE statistical modeling Training Voltage
ISSN:	0018-9383, 1557-9646
Online Access:	Get full text
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