Complete and Improved FPGA Implementation of Classic McEliece

We present the first specification-compliant constant-time FPGA implementation of the Classic McEliece cryptosystem from the third-round of NIST’s Post-Quantum Cryptography standardization process. In particular, we present the first complete implementation including encapsulation and decapsulation...

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Published in:IACR transactions on cryptographic hardware and embedded systems Vol. 2022; no. 3; pp. 71 - 113
Main Authors: Chen, Po-Jen, Chou, Tung, Deshpande, Sanjay, Lahr, Norman, Niederhagen, Ruben, Szefer, Jakub, Wang, Wen
Format: Journal Article
Language:English
Published: Ruhr-Universität Bochum 08.06.2022
Subjects:
Classic McEliece
Code-Based Cryptography
FPGA
Hardware Implementation
Key Encapsulation Mechanism
PQC
ISSN:2569-2925, 2569-2925
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Abstract We present the first specification-compliant constant-time FPGA implementation of the Classic McEliece cryptosystem from the third-round of NIST’s Post-Quantum Cryptography standardization process. In particular, we present the first complete implementation including encapsulation and decapsulation modules as well as key generation with seed expansion. All the hardware modules are parametrizable, at compile time, with security level and performance parameters. As the most time consuming operation of Classic McEliece is the systemization of the public key matrix during key generation, we present and evaluate three new algorithms that can be used for systemization while complying with the specification: hybrid early-abort systemizer (HEA), single-pass early-abort systemizer (SPEA), and dual-pass earlyabort systemizer (DPEA). All of the designs outperform the prior systemizer designs for Classic McEliece by 2.2x to 2.6x in average runtime and by 1.7x to 2.4x in time-area efficiency. We show that our complete Classic McEliece design for example can perform key generation in 5.2 ms to 20 ms, encapsulation in 0.1 ms to 0.5 ms, and decapsulation in 0.7 ms to 1.5 ms for all security levels on an Xlilinx Artix 7 FPGA. The performance can be increased even further at the cost of resources by increasing the level of parallelization using the performance parameters of our design.
AbstractList We present the first specification-compliant constant-time FPGA implementation of the Classic McEliece cryptosystem from the third-round of NIST’s Post-Quantum Cryptography standardization process. In particular, we present the first complete implementation including encapsulation and decapsulation modules as well as key generation with seed expansion. All the hardware modules are parametrizable, at compile time, with security level and performance parameters. As the most time consuming operation of Classic McEliece is the systemization of the public key matrix during key generation, we present and evaluate three new algorithms that can be used for systemization while complying with the specification: hybrid early-abort systemizer (HEA), single-pass early-abort systemizer (SPEA), and dual-pass earlyabort systemizer (DPEA). All of the designs outperform the prior systemizer designs for Classic McEliece by 2.2x to 2.6x in average runtime and by 1.7x to 2.4x in time-area efficiency. We show that our complete Classic McEliece design for example can perform key generation in 5.2 ms to 20 ms, encapsulation in 0.1 ms to 0.5 ms, and decapsulation in 0.7 ms to 1.5 ms for all security levels on an Xlilinx Artix 7 FPGA. The performance can be increased even further at the cost of resources by increasing the level of parallelization using the performance parameters of our design.
Author Lahr, Norman
Niederhagen, Ruben
Chou, Tung
Wang, Wen
Deshpande, Sanjay
Szefer, Jakub
Chen, Po-Jen
Author_xml – sequence: 1
  givenname: Po-Jen
  surname: Chen
  fullname: Chen, Po-Jen
– sequence: 2
  givenname: Tung
  surname: Chou
  fullname: Chou, Tung
– sequence: 3
  givenname: Sanjay
  surname: Deshpande
  fullname: Deshpande, Sanjay
– sequence: 4
  givenname: Norman
  surname: Lahr
  fullname: Lahr, Norman
– sequence: 5
  givenname: Ruben
  surname: Niederhagen
  fullname: Niederhagen, Ruben
– sequence: 6
  givenname: Jakub
  surname: Szefer
  fullname: Szefer, Jakub
– sequence: 7
  givenname: Wen
  surname: Wang
  fullname: Wang, Wen
BookMark eNqFkF1LwzAUhoNMcM79BekfaM1nk4BejLLNgaIXeh2SNNWMthlJGfjvrZ2IeOPV-YD3OYfnEsz60DsArhEsaMlEeTPYd5eKI4YYF54UHOUIkTMwx6yUOZaYzX71F2CZ0h5CiBlkiMs5uKtCd2jd4DLd19muO8RwdHW2ed6uvqbWda4f9OBDn4Umq1qdkrfZo1233ll3Bc4b3Sa3_K4L8LpZv1T3-cPTdletHnKLBSU5RryR44Om1kZyKxkhwjgBCae4IZw5ayC3NWICWyglhQ4jqAU11hoOhSELsDtx66D36hB9p-OHCtqraRHim9Jx8LZ1ChpISk0bBimnpeYaG1Hqxtb1eAMbObLKE8vGkFJ0zQ8PQTU5VZNTNTlVniiO1Oh0DN7-CVp_UjNE7dv_4p-XB4Co
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ContentType Journal Article
DBID AAYXX
CITATION
DOA
DOI 10.46586/tches.v2022.i3.71-113
DatabaseName CrossRef
DOAJ Directory of Open Access Journals
DatabaseTitle CrossRef
DatabaseTitleList
CrossRef
Database_xml – sequence: 1
  dbid: DOA
  name: DOAJ Directory of Open Access Journals
  url: https://www.doaj.org/
  sourceTypes: Open Website
DeliveryMethod fulltext_linktorsrc
EISSN 2569-2925
EndPage 113
ExternalDocumentID oai_doaj_org_article_0b036a4f504746a7a2b86afcddb072b9
10_46586_tches_v2022_i3_71_113
GroupedDBID AAFWJ
AAYXX
AFPKN
ALMA_UNASSIGNED_HOLDINGS
CITATION
GROUPED_DOAJ
M~E
ID FETCH-LOGICAL-c2843-217f9022bdab97c95338be803742f375ecb07cd1582c09940e210a84bccb708b3
IEDL.DBID DOA
ISSN 2569-2925
IngestDate Mon Nov 10 04:34:08 EST 2025
Sat Nov 29 02:10:49 EST 2025
Tue Nov 18 22:26:39 EST 2025
IsDoiOpenAccess true
IsOpenAccess true
IsPeerReviewed true
IsScholarly true
Issue 3
Language English
License https://creativecommons.org/licenses/by/4.0
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-c2843-217f9022bdab97c95338be803742f375ecb07cd1582c09940e210a84bccb708b3
OpenAccessLink https://doaj.org/article/0b036a4f504746a7a2b86afcddb072b9
PageCount 43
ParticipantIDs doaj_primary_oai_doaj_org_article_0b036a4f504746a7a2b86afcddb072b9
crossref_primary_10_46586_tches_v2022_i3_71_113
crossref_citationtrail_10_46586_tches_v2022_i3_71_113
PublicationCentury 2000
PublicationDate 2022-06-08
PublicationDateYYYYMMDD 2022-06-08
PublicationDate_xml – month: 06
  year: 2022
  text: 2022-06-08
  day: 08
PublicationDecade 2020
PublicationTitle IACR transactions on cryptographic hardware and embedded systems
PublicationYear 2022
Publisher Ruhr-Universität Bochum
Publisher_xml – name: Ruhr-Universität Bochum
SSID ssj0002505179
Score 2.3235948
Snippet We present the first specification-compliant constant-time FPGA implementation of the Classic McEliece cryptosystem from the third-round of NIST’s Post-Quantum...
SourceID doaj
crossref
SourceType Open Website
Enrichment Source
Index Database
StartPage 71
SubjectTerms Classic McEliece
Code-Based Cryptography
FPGA
Hardware Implementation
Key Encapsulation Mechanism
PQC
Title Complete and Improved FPGA Implementation of Classic McEliece
URI https://doaj.org/article/0b036a4f504746a7a2b86afcddb072b9
Volume 2022
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
journalDatabaseRights – providerCode: PRVAON
  databaseName: DOAJ Directory of Open Access Journals
  customDbUrl:
  eissn: 2569-2925
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0002505179
  issn: 2569-2925
  databaseCode: DOA
  dateStart: 20180101
  isFulltext: true
  titleUrlDefault: https://www.doaj.org/
  providerName: Directory of Open Access Journals
– providerCode: PRVHPJ
  databaseName: ROAD: Directory of Open Access Scholarly Resources (ISSN International Center)
  customDbUrl:
  eissn: 2569-2925
  dateEnd: 99991231
  omitProxy: false
  ssIdentifier: ssj0002505179
  issn: 2569-2925
  databaseCode: M~E
  dateStart: 20180101
  isFulltext: true
  titleUrlDefault: https://road.issn.org
  providerName: ISSN International Centre
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwrV09T8MwELVQxcCCQIAoX_LA6jaOHdsZC2phoeoAUrfIn1IkSKu2dOS3c3ZCVSYWlgxRbJ3fWT6_6O4dQvfGl1zq4ElhhCOcW00Ut4xIaoD7KG6sbJtNyOlUzeflbK_VV8wJa-WBW-CGmYEzVvNQZFxyoaXOjRI6WOdMJnOTSvcyWe6RqXgGx8AOW60tCeYQZcUwgrAebIHs54OaDSQllLJf0WhPtD9Fl8kJOu6uhXjUmnOKDnxzhmL1xhJw9RjoPm7pv3d4Mnsa4aTq-9EVDjV4EXBqb1lbHP-w1d76c_Q2Gb8-PpOu3QGxAAojQA5CCdYZp00pbcz7VMarKBCTByYLb2HF1tFC5RbudTzzQNd0hNMamSnDLlCvWTT-EuHgS0mdoMIzxoP2yjhluDCCy8JR7_qo-Fl2ZTst8NiS4r0CTpDgqhJcVYKrqlklKXAF1kfD3bhlq4bx54iHiOru66hmnV6Aj6vOx9VfPr76j0mu0VE0LaV5qRvU26w-_S06tNtNvV7dpe0Dz5ev8Tca58pS
linkProvider Directory of Open Access Journals
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Complete+and+Improved+FPGA+Implementation+of+Classic+McEliece&rft.jtitle=IACR+transactions+on+cryptographic+hardware+and+embedded+systems&rft.au=Po-Jen+Chen&rft.au=Tung+Chou&rft.au=Sanjay+Deshpande&rft.au=Norman+Lahr&rft.date=2022-06-08&rft.pub=Ruhr-Universit%C3%A4t+Bochum&rft.eissn=2569-2925&rft.volume=2022&rft.issue=3&rft_id=info:doi/10.46586%2Ftches.v2022.i3.71-113&rft.externalDBID=DOA&rft.externalDocID=oai_doaj_org_article_0b036a4f504746a7a2b86afcddb072b9
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2569-2925&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2569-2925&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2569-2925&client=summon