An Asynchronous Parallel Supernodal Algorithm for Sparse Gaussian Elimination
Although Gaussian elimination with partial pivoting is a robust algorithm to solve unsymmetric sparse linear systems of equations, it is difficult to implement efficiently on parallel machines because of its dynamic and somewhat unpredictable way of generating work and intermediate results at run ti...
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| Veröffentlicht in: | SIAM journal on matrix analysis and applications Jg. 20; H. 4; S. 915 - 952 |
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| Hauptverfasser: | , , |
| Format: | Journal Article |
| Sprache: | Englisch |
| Veröffentlicht: |
Philadelphia
Society for Industrial and Applied Mathematics
1999
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| Schlagworte: | |
| ISSN: | 0895-4798, 1095-7162 |
| Online-Zugang: | Volltext |
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| Zusammenfassung: | Although Gaussian elimination with partial pivoting is a robust algorithm to solve unsymmetric sparse linear systems of equations, it is difficult to implement efficiently on parallel machines because of its dynamic and somewhat unpredictable way of generating work and intermediate results at run time. In this paper, we present an efficient parallel algorithm that overcomes this difficulty. The high performance of our algorithm is achieved through (1) using a graph reduction technique and a supernode-panel computational kernel for high single processor utilization, and (2) scheduling two types of parallel tasks for a high level of concurrency. One such task is factoring the independent panels in the disjoint subtrees of the column elimination tree of $A$. Another task is updating a panel by previously computed supernodes. A scheduler assigns tasks to free processors dynamically and facilitates the smooth transition between the two types of parallel tasks. No global synchronization is used in the algorithm. The algorithm is well suited for shared memory machines (SMP) with a modest number of processors. We demonstrate 4- to 7-fold speedups on a range of 8 processor SMPs, and more on larger SMPs. One realistic problem arising from a 3-D flow calculation achieves factorization rates of 1.0, 2.5, 0.8, and 0.8 gigaflops on the 12 processor Power Challenge, 8 processor Cray C90, 16 processor Cray J90, and 8 processor AlphaServer 8400. |
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| Bibliographie: | ObjectType-Article-1 SourceType-Scholarly Journals-1 content type line 14 |
| ISSN: | 0895-4798 1095-7162 |
| DOI: | 10.1137/S0895479897317685 |