Lower Bound of Circuit Complexity of Parity Function in a Basis of Unbounded Fan-In

The paper is focused on the implementation of parity functions by circuits in the basis . This basis consists of all gates that implement functions of the form . It is proved that every circuit in implementing a parity function of variables contains at least gates.

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Veröffentlicht in:Moscow University mathematics bulletin Jg. 76; H. 6; S. 266 - 270
1. Verfasser: Kombarov, Yu. A.
Format: Journal Article
Sprache:Englisch
Veröffentlicht: Moscow Pleiades Publishing 01.12.2021
Springer Nature B.V
Schlagworte:
Analysis
Gates (circuits)
Lower bounds
Mathematical analysis
Mathematics
Mathematics and Statistics
Parity
circuit complexity
parity function
minimal circuit
Boolean circuits
ISSN:0027-1322, 1934-8444
Online-Zugang:Volltext
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Zusammenfassung:The paper is focused on the implementation of parity functions by circuits in the basis . This basis consists of all gates that implement functions of the form . It is proved that every circuit in implementing a parity function of variables contains at least gates.
Bibliographie:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:0027-1322
1934-8444
DOI:10.3103/S002713222106005X