Lower Bound of Circuit Complexity of Parity Function in a Basis of Unbounded Fan-In
The paper is focused on the implementation of parity functions by circuits in the basis . This basis consists of all gates that implement functions of the form . It is proved that every circuit in implementing a parity function of variables contains at least gates.
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| Vydané v: | Moscow University mathematics bulletin Ročník 76; číslo 6; s. 266 - 270 |
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| Hlavný autor: | |
| Médium: | Journal Article |
| Jazyk: | English |
| Vydavateľské údaje: |
Moscow
Pleiades Publishing
01.12.2021
Springer Nature B.V |
| Predmet: | |
| ISSN: | 0027-1322, 1934-8444 |
| On-line prístup: | Získať plný text |
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| Shrnutí: | The paper is focused on the implementation of parity functions by circuits in the basis
. This basis consists of all gates that implement functions of the form
. It is proved that every circuit in
implementing a parity function of
variables contains at least
gates. |
|---|---|
| Bibliografia: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
| ISSN: | 0027-1322 1934-8444 |
| DOI: | 10.3103/S002713222106005X |