Lower Bound of Circuit Complexity of Parity Function in a Basis of Unbounded Fan-In

The paper is focused on the implementation of parity functions by circuits in the basis . This basis consists of all gates that implement functions of the form . It is proved that every circuit in implementing a parity function of variables contains at least gates.

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Bibliographic Details
Published in:Moscow University mathematics bulletin Vol. 76; no. 6; pp. 266 - 270
Main Author: Kombarov, Yu. A.
Format: Journal Article
Language:English
Published: Moscow Pleiades Publishing 01.12.2021
Springer Nature B.V
Subjects:
Analysis
Gates (circuits)
Lower bounds
Mathematical analysis
Mathematics
Mathematics and Statistics
Parity
circuit complexity
parity function
minimal circuit
Boolean circuits
ISSN:0027-1322, 1934-8444
Online Access:Get full text
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Description
Summary:The paper is focused on the implementation of parity functions by circuits in the basis . This basis consists of all gates that implement functions of the form . It is proved that every circuit in implementing a parity function of variables contains at least gates.
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content type line 14
ISSN:0027-1322
1934-8444
DOI:10.3103/S002713222106005X