Li, X., Pan, Y., Jin, Q., Chen, L., Lou, Y., Wu, B., . . . Lin, Z. (2025). Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems. IEEE transactions on very large scale integration (VLSI) systems, 33(8), 2214-2224. https://doi.org/10.1109/TVLSI.2025.3572140
Citace podle Chicago (17th ed.)Li, Xin, et al. "Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 33, no. 8 (2025): 2214-2224. https://doi.org/10.1109/TVLSI.2025.3572140.
Citace podle MLA (9th ed.)Li, Xin, et al. "Full-Array Boolean Logic CIM Macro With Self-Recycling 10T-SRAM Cell for AES Systems." IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 33, no. 8, 2025, pp. 2214-2224, https://doi.org/10.1109/TVLSI.2025.3572140.