Backpropagation Algorithm and its Hardware Implementations: A Review

Nowadays, artificial intelligence is gearing up at faster pace. Hardware integration with Artificial Neural Networks (ANN) have paved the way to different applications in areas like control engineering, robotics and navigation. There has been extensive research in the field of machine learning to us...

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Vydané v:Journal of physics. Conference series Ročník 1804; číslo 1; s. 12169
Hlavní autori: Kuninti, Shivani, Rooban, S
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Bristol IOP Publishing 01.02.2021
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ISSN:1742-6588, 1742-6596
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Shrnutí:Nowadays, artificial intelligence is gearing up at faster pace. Hardware integration with Artificial Neural Networks (ANN) have paved the way to different applications in areas like control engineering, robotics and navigation. There has been extensive research in the field of machine learning to use the system in advanced applications. The combination of hardware and software modules help to build systems in a robust manner. This paper focuses mainly on back propagation algorithm and its different hardware implementation using FPGA, ASIC, Memristor and Microcontroller. Implementation of back propagation algorithm on Field programmable gate arrays is analysed in detail. FPGAs parallel processing feature makes it unique for neural networks. The parallel processing models implement back propagation algorithms for calculating errors in the hidden layers of neural networks. This review helps the researchers to understand the implementation of various hardware with back propagation algorithm also the comparative analysis on the parameters helps to identify the suitable hardware based on their requirements.
Bibliografia:ObjectType-Conference Proceeding-1
SourceType-Scholarly Journals-1
content type line 14
ISSN:1742-6588
1742-6596
DOI:10.1088/1742-6596/1804/1/012169