Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells

The inverting subset of fan-out-free boolean functions describe the majority of implementable single-output combinatorial static CMOS gates. Given that each function has many expressions, a method for uniquely identifying these functions is presented and used to determine complements. A large and ri...

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Bibliographic Details
Published in:IEEE transactions on circuits and systems. II, Express briefs Vol. 66; no. 7; pp. 1164 - 1168
Main Authors: Brunhaver, John, Uhrie, Richard, Clark, Lawrence T.
Format: Journal Article
Language:English
Published: New York IEEE 01.07.2019
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Boolean algebra
Boolean functions
Circuits and systems
CMOS
Combinatorial analysis
digital circuits
digital integrated circuits
Fanout
Functionals
integrated circuits
Layout
Libraries
Logic gates
Pins
Reduction
Routing
Transistors
very large scale integration circuits and systems
Viability
ISSN:1549-7747, 1558-3791
Online Access:Get full text
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Summary:The inverting subset of fan-out-free boolean functions describe the majority of implementable single-output combinatorial static CMOS gates. Given that each function has many expressions, a method for uniquely identifying these functions is presented and used to determine complements. A large and rich standard cell library incorporates many of these functions, but a reduction in cell-height limits their inclusion due to constraints on internal cell routing. This brief presents a method for listing all such functions and rapid analysis of their viability in different cell heights. Finally, the design constraints in advanced technology nodes limit the utility of a large number of these functions. Those limitations and their impact on the resulting reduction in feasible cells are also described.
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ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2018.2875334