All-pairs Shortest Path Algorithm based on MPI+CUDA Distributed Parallel Programming Model

In view of the problem that computing shortest paths in a graph is a complex and time-consuming process, and the traditional algorithm that rely on the CPU as computing unit solely can't meet the demand of real-time processing, in this paper, we present an all-pairs shortest paths algorithm usi...

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Vydané v:Journal of networks Ročník 8; číslo 12; s. 2797
Hlavní autori: Wu, Qingshuang, Tong, Chunya, Wang, Qiang, Cheng, Xiangfu
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Oulu Academy Publisher 01.12.2013
Predmet:
Algorithms
ISSN:1796-2056, 1796-2056
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Shrnutí:In view of the problem that computing shortest paths in a graph is a complex and time-consuming process, and the traditional algorithm that rely on the CPU as computing unit solely can't meet the demand of real-time processing, in this paper, we present an all-pairs shortest paths algorithm using MPI+CUDA hybrid programming model, which can take use of the overwhelming computing power of the GPU cluster to speed up the processing. This proposed algorithm can combine the advantages of MPI and CUDA programming model, and can realize two-level parallel computing. In the cluster-level, we take use of the MPI programming model to achieve a coarse-grained parallel computing between the computational nodes of the GPU cluster. In the node-level, we take use of the CUDA programming model to achieve a GPU-accelerated fine grit parallel computing in each computational node internal. The experimental results show that the MPI+CUDA-based parallel algorithm can take full advantage of the powerful computing capability of the GPU cluster, and can achieve about hundreds of time speedup; The whole algorithm has good computing performance, reliability and scalability, and it is able to meet the demand of real-time processing of massive spatial shortest path analysis. Index Terms-Shortest Path Problem; GPU Cluster; Floyd- Warshall Algorithm; Parallel Computing; MPI; CUDA
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ISSN:1796-2056
1796-2056
DOI:10.4304/jnw.8.12.2797-2803