Synthesis of multilevel NAND gate circuits for incompletely specified multi-output Boolean functions and CAD using permissible cubes and PCRM graphs

A computer-aided design procedure for the automatic design of multilevel NAND gate logic networks as encountered in the synthesis of VLSI logic circuits is presented. A powerful technique using logic zero-one-interaction of permissible cubes is among the salient features in the synthesizing algorith...

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Vydané v:	International journal of electronics Ročník 78; číslo 2; s. 303 - 316
Hlavní autori:	CHEN, LIANG-CHIA, TWU, HORNG-TAY
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	London Taylor & Francis Group 01.02.1995 Taylor & Francis
Predmet:	Applied sciences Circuit properties Digital circuits Electric, optical and optoelectronic circuits Electronic circuits Electronics Exact sciences and technology
ISSN:	0020-7217, 1362-3060
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