Transistency Models: Memory Ordering at the Hardware-OS Interface

Modern computer systems include numerous compute elements, from CPUs to GPUs to accelerators. Harnessing their full potential requires well-defined, properly-implemented memory consistency models and virtual memory subsystems. Unfortunately, it is difficult to specify and implement hardware-OS inter...

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Veröffentlicht in:	IEEE MICRO S. 1
Hauptverfasser:	Lustig, Daniel, Sethi, Geet, Bhattacharjee, Abhishek, Martonosi, Margaret
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	IEEE 14.06.2017
Schlagworte:	Analytical models B Hardware B.3 Memory Structures B.3.2 Design Styles B.3.2.g Shared memory C Computer Systems Organization C.0 General C.0.d Modeling of computer architecture Computational modeling D Software/Software Engineering D.2 Software Engineering D.2.5 Testing and Debugging D.2.5.r Testing tools D.4 Operating Systems D.4.2 Storage Management D.4.2.i Virtual memory D.4.5 Reliability D.4.5.f Verification Hardware Microarchitecture Object recognition Operating systems
ISSN:	0272-1732
Online-Zugang:	Volltext
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