Design for Embedded Image Processing on FPGAs
Dr Donald Bailey starts with introductory material considering the problem of embedded image processing, and how some of the issues may be solved using parallel hardware solutions. Field programmable gate arrays (FPGAs) are introduced as a technology that provides flexible, fine-grained hardware tha...
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| Format: | E-Book Buch |
| Sprache: | Englisch |
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New York, NY
Wiley
2011
WILEY John Wiley & Sons, Incorporated Wiley-IEEE Press Wiley-Blackwell IEEE John Wiley & Sons (Asia) |
| Ausgabe: | 1 |
| Schriftenreihe: | Wiley - IEEE |
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| ISBN: | 9780470828496, 0470828498, 0470828501, 9780470828502, 9780470828519, 047082851X, 9781118073315, 1118073312, 0470828528, 9780470828526 |
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Inhaltsangabe:
- Preface. Acknowledgements. 1 Image Processing. 1.1 Basic Definitions. 1.2 Image Formation. 1.3 Image Processing Operations. 1.4 Example Application. 1.5 Real-Time Image Processing. 1.6 Embedded Image Processing. 1.7 Serial Processing. 1.8 Parallelism. 1.9 Hardware Image Processing Systems. 2 Field Programmable Gate Arrays. 2.1 Programmable Logic. 2.2 FPGAs and Image Processing. 2.3 Inside an FPGA. 2.4 FPGA Families and Features. 2.5 Choosing an FPGA or Development Board. 3 Languages. 3.1 Hardware Description Languages. 3.2 Software-Based Languages. 3.3 Visual Languages. 3.4 Summary. 4 Design Process. 4.1 Problem Specification. 4.2 Algorithm Development. 4.3 Architecture Selection. 4.4 System Implementation. 4.5 Designing for Tuning and Debugging. 5 Mapping Techniques. 5.1 Timing Constraints. 5.2 Memory Bandwidth Constraints. 5.3 Resource Constraints. 5.4 Computational Techniques. 5.5 Summary. 6 Point Operations. 6.1 Point Operations on a Single Image. 6.2 Point Operations on Multiple Images. 6.3 Colour Image Processing. 6.4 Summary. 7 Histogram Operations. 7.1 Greyscale Histogram. 7.2 Multidimensional Histograms. 8 Local Filters. 8.1 Caching. 8.2 Linear Filters. 8.3 Nonlinear Filters. 8.4 Rank Filters. 8.5 Colour Filters. 8.6 Morphological Filters. 8.7 Adaptive Thresholding. 8.8 Summary. 9 Geometric Transformations. 9.1 Forward Mapping. 9.2 Reverse Mapping. 9.3 Interpolation. 9.4 Mapping Optimisations. 9.5 Image Registration. 10 Linear Transforms. 10.1 Fourier Transform. 10.2 Discrete Cosine Transform. 10.3 Wavelet Transform. 10.4 Image and Video Coding. 11 Blob Detection and Labelling. 11.1 Bounding Box. 11.2 Run-Length Coding. 11.3 Chain Coding. 11.4 Connected Component Labelling. 11.5 Distance Transform. 11.6 Watershed Transform. 11.7 Hough Transform. 11.8 Summary. 12 Interfacing. 12.1 Camera Input. 12.2 Display Output. 12.3 Serial Communication. 12.4 Memory. 12.5 Summary. 13 Testing, Tuning and Debugging. 13.1 Design. 13.2 Implementation. 13.3 Tuning. 13.4 Timing Closure. 14 Example Applications. 14.1 Coloured Region Tracking. 14.2 Lens Distortion Correction. 14.3 Foveal Sensor. 14.4 Range Imaging. 14.5 Real-Time Produce Grading. 14.6 Summary. References. Index.
- Design for embedded image processing on FPGAs -- Contents -- Preface -- Acknowledgements -- 1. Image Processing -- 2. Field Programmable Gate Arrays -- 3. Languages -- 4. Design Process -- 5. Mapping Techniques -- 6. Point Operations -- 7. Histogram Operations -- 8. Local Filters -- 9. Geometric Transformations -- 10. Linear Transforms -- 11. Blob Detection and Labelling -- 12. Interfacing -- 13. Testing, Tuning and Debugging -- 14. Example Applications -- References -- Index -- Colour Plates.
- Design for Embedded Image Processing on FPGAs -- Contents -- Preface -- Acknowledgements -- 1 Image Processing -- 1.1 Basic Definitions -- 1.2 Image Formation -- 1.3 Image Processing Operations -- 1.4 Example Application -- 1.5 Real-Time Image Processing -- 1.6 Embedded Image Processing -- 1.7 Serial Processing -- 1.8 Parallelism -- 1.9 Hardware Image Processing Systems -- 2 Field Programmable Gate Arrays -- 2.1 Programmable Logic -- 2.1.1 FPGAs vs. ASICs -- 2.2 FPGAs and Image Processing -- 2.3 Inside an FPGA -- 2.3.1 Logic -- 2.3.2 Interconnect -- 2.3.3 Input and Output -- 2.3.4 Clocking -- 2.3.5 Configuration -- 2.3.6 Power Consumption -- 2.4 FPGA Families and Features -- 2.4.1 Xilinx -- 2.4.2 Altera -- 2.4.3 Lattice Semiconductor -- 2.4.4 Achronix -- 2.4.5 SiliconBlue -- 2.4.6 Tabula -- 2.4.7 Actel -- 2.4.8 Atmel -- 2.4.9 QuickLogic -- 2.4.10 MathStar -- 2.4.11 Cypress -- 2.5 Choosing an FPGA or Development Board -- 3 Languages -- 3.1 Hardware Description Languages -- 3.2 Software-Based Languages -- 3.2.1 Structural Approaches -- 3.2.2 Augmented Languages -- 3.2.3 Native Compilation Techniques -- 3.3 Visual Languages -- 3.3.1 Behavioural -- 3.3.2 Dataflow -- 3.3.3 Hybrid -- 3.4 Summary -- 4 Design Process -- 4.1 Problem Specification -- 4.2 Algorithm Development -- 4.2.1 Algorithm Development Process -- 4.2.2 Algorithm Structure -- 4.2.3 FPGA Development Issues -- 4.3 Architecture Selection -- 4.3.1 System Level Architecture -- 4.3.2 Computational Architecture -- 4.3.3 Partitioning between Hardware and Software -- 4.4 System Implementation -- 4.4.1 Mapping to FPGA Resources -- 4.4.2 Algorithm Mapping Issues -- 4.4.3 Design Flow -- 4.5 Designing for Tuning and Debugging -- 4.5.1 Algorithm Tuning -- 4.5.2 System Debugging -- 5 Mapping Techniques -- 5.1 Timing Constraints -- 5.1.1 Low Level Pipelining -- 5.1.2 Process Synchronisation
- 12.1.4 Bayer Pattern Processing -- 12.2 Display Output -- 12.2.1 Display Driver -- 12.2.2 Display Content -- 12.3 Serial Communication -- 12.3.1 PS2 Interface -- 12.3.2 I2C -- 12.3.3 SPI -- 12.3.4 RS-232 -- 12.3.5 USB -- 12.3.6 Ethernet -- 12.3.7 PCI Express -- 12.4 Memory -- 12.4.1 Static RAM -- 12.4.2 Dynamic RAM -- 12.4.3 Flash Memory -- 12.5 Summary -- 13 Testing, Tuning and Debugging -- 13.1 Design -- 13.1.1 Random Noise Sources -- 13.2 Implementation -- 13.2.1 Common Implementation Bugs -- 13.3 Tuning -- 13.4 Timing Closure -- 14 Example Applications -- 14.1 Coloured Region Tracking -- 14.2 Lens Distortion Correction -- 14.2.1 Characterising the Distortion -- 14.2.2 Correcting the Distortion -- 14.3 Foveal Sensor -- 14.3.1 Foveal Mapping -- 14.3.2 Using the Sensor -- 14.4 Range Imaging -- 14.4.1 Extending the Unambiguous Range -- 14.5 Real-Time Produce Grading -- 14.5.1 Software Algorithm -- 14.5.2 Hardware Implementation -- 14.6 Summary -- References -- Index -- Colour Plates
- 8.7 Adaptive Thresholding -- 8.7.1 Error Diffusion -- 8.8 Summary -- 9 Geometric Transformations -- 9.1 Forward Mapping -- 9.1.1 Separable Mapping -- 9.2 Reverse Mapping -- 9.3 Interpolation -- 9.3.1 Bilinear Interpolation -- 9.3.2 Bicubic Interpolation -- 9.3.3 Splines -- 9.3.4 Interpolating Compressed Data -- 9.4 Mapping Optimisations -- 9.5 Image Registration -- 9.5.1 Feature-Based Methods -- 9.5.2 Area-Based Methods -- 9.5.3 Applications -- 10 Linear Transforms -- 10.1 Fourier Transform -- 10.1.1 Fast Fourier Transform -- 10.1.2 Filtering -- 10.1.3 Inverse Filtering -- 10.1.4 Interpolation -- 10.1.5 Registration -- 10.1.6 Feature Extraction -- 10.1.7 Goertzel's Algorithm -- 10.2 Discrete Cosine Transform -- 10.3 Wavelet Transform -- 10.3.1 Filter Implementations -- 10.3.2 Applications of the Wavelet Transform -- 10.4 Image and Video Coding -- 11 Blob Detection and Labelling -- 11.1 Bounding Box -- 11.2 Run-Length Coding -- 11.3 Chain Coding -- 11.3.1 Sequential Implementation -- 11.3.2 Single Pass Algorithms -- 11.3.3 Feature Extraction -- 11.4 Connected Component Labelling -- 11.4.1 Random Access Algorithms -- 11.4.2 Multiple-Pass Algorithms -- 11.4.3 Two-Pass Algorithms -- 11.4.4 Single-Pass Algorithms -- 11.4.5 Multiple Input Labels -- 11.4.6 Further Optimisations -- 11.5 Distance Transform -- 11.5.1 Morphological Approaches -- 11.5.2 Chamfer Distance -- 11.5.3 Separable Transform -- 11.5.4 Applications -- 11.5.5 Geodesic Distance Transform -- 11.6 Watershed Transform -- 11.6.1 Flow Algorithms -- 11.6.2 Immersion Algorithms -- 11.6.3 Applications -- 11.7 Hough Transform -- 11.7.1 Line Hough Transform -- 11.7.2 Circle Hough Transform -- 11.7.3 Generalised Hough Transform -- 11.8 Summary -- 12 Interfacing -- 12.1 Camera Input -- 12.1.1 Camera Interface Standards -- 12.1.2 Deinterlacing -- 12.1.3 Global and Rolling Shutter Correction
- 5.1.3 Multiple Clock Domains -- 5.2 Memory Bandwidth Constraints -- 5.2.1 Memory Architectures -- 5.2.2 Caching -- 5.2.3 Row Buffering -- 5.2.4 Other Memory Structures -- 5.3 Resource Constraints -- 5.3.1 Resource Multiplexing -- 5.3.2 Resource Controllers -- 5.3.3 Reconfigurability -- 5.4 Computational Techniques -- 5.4.1 Number Systems -- 5.4.2 Lookup Tables -- 5.4.3 CORDIC -- 5.4.4 Approximations -- 5.4.5 Other Techniques -- 5.5 Summary -- 6 Point Operations -- 6.1 Point Operations on a Single Image -- 6.1.1 Contrast and Brightness Adjustment -- 6.1.2 Global Thresholding and Contouring -- 6.1.3 Lookup Table Implementation -- 6.2 Point Operations on Multiple Images -- 6.2.1 Image Averaging -- 6.2.2 Image Subtraction -- 6.2.3 Image Comparison -- 6.2.4 Intensity Scaling -- 6.2.5 Masking -- 6.3 Colour Image Processing -- 6.3.1 False Colouring -- 6.3.2 Colour Space Conversion -- 6.3.3 Colour Thresholding -- 6.3.4 Colour Correction -- 6.3.5 Colour Enhancement -- 6.4 Summary -- 7 Histogram Operations -- 7.1 Greyscale Histogram -- 7.1.1 Data Gathering -- 7.1.2 Histogram Equalisation -- 7.1.3 Automatic Exposure -- 7.1.4 Threshold Selection -- 7.1.5 Histogram Similarity -- 7.2 Multidimensional Histograms -- 7.2.1 Triangular Arrays -- 7.2.2 Multidimensional Statistics -- 7.2.3 Colour Segmentation -- 7.2.4 Colour Indexing -- 7.2.5 Texture Analysis -- 8 Local Filters -- 8.1 Caching -- 8.2 Linear Filters -- 8.2.1 Noise Smoothing -- 8.2.2 Edge Detection -- 8.2.3 Edge Enhancement -- 8.2.4 Linear Filter Techniques -- 8.3 Nonlinear Filters -- 8.3.1 Edge Orientation -- 8.3.2 Non-maximal Suppression -- 8.3.3 Zero-Crossing Detection -- 8.4 Rank Filters -- 8.4.1 Rank Filter Sorting Networks -- 8.4.2 Adaptive Histogram Equalisation -- 8.5 Colour Filters -- 8.6 Morphological Filters -- 8.6.1 Binary Morphology -- 8.6.2 Greyscale Morphology -- 8.6.3 Colour Morphology