Alternate Path μ-op Cache Prefetching

Datacenter applications are well-known for their large code footprints. This has caused frontend design to evolve by implementing decoupled fetching and large prediction structures - branch predictors, Branch Target Buffers (BTBs) - to mitigate the stagnating size of the instruction cache by prefetc...

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Vydané v:	2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA) s. 1230 - 1245
Hlavní autori:	Singh, Sawan, Perais, Arthur, Jimborean, Alexandra, Ros, Alberto
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 29.06.2024
Predmet:	Codes Computer architecture core design Decoding Focusing hard-to-predict branches Micro-op Cache Pipelines Prefetching processor front-end Proposals
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