Power-conscious Scheduling for Real-time Embedded Systems Design

Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. We address a power optimization method for real-time embedded applications on a variable speed processor. The method combine...

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Vydané v:VLSI Design Ročník 2001; číslo 2; s. l139 - 150
Hlavní autori: Shin, Youngsoo, Choi, Kiyoung, Sakurai, Takayasu
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Hindawi Limiteds 01.01.2001
Predmet:
CMOS
Scheduling
Processor
Low-power
Real-time
Operating system
ISSN:1065-514X, 1563-5171
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Shrnutí:Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. We address a power optimization method for real-time embedded applications on a variable speed processor. The method combines off-line and on-line components. The off-line component determines the lowest possible maximum processor speed while guaranteeing deadlines of all tasks. The on-line component dynamically varies the processor speed or bring a processor into a power-down mode to exploit execution time variations and idle intervals. Experimental results show that the proposed method obtains a significant power reduction across several kinds of applications.
Bibliografia:ObjectType-Article-2
SourceType-Scholarly Journals-1
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ISSN:1065-514X
1563-5171
DOI:10.1155/2001/23925