Neural Acceleration for General-Purpose Approximate Programs

This paper describes a learning-based approach to the acceleration of approximate programs. We describe the \emph{Parrot transformation}, a program transformation that selects and trains a neural network to mimic a region of imperative code. After the learning phase, the compiler replaces the origin...

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Published in:2012 45th Annual IEEE/ACM International Symposium on Microarchitecture pp. 449 - 460
Main Authors: Esmaeilzadeh, H., Sampson, A., Ceze, L., Burger, D.
Format: Conference Proceeding
Language:English
Published: IEEE 01.12.2012
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ISSN:1072-4451
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Abstract This paper describes a learning-based approach to the acceleration of approximate programs. We describe the \emph{Parrot transformation}, a program transformation that selects and trains a neural network to mimic a region of imperative code. After the learning phase, the compiler replaces the original code with an invocation of a low-power accelerator called a \emph{neural processing unit} (NPU). The NPU is tightly coupled to the processor pipeline to accelerate small code regions. Since neural networks produce inherently approximate results, we define a programming model that allows programmers to identify approximable code regions -- code that can produce imprecise but acceptable results. Offloading approximable code regions to NPUs is faster and more energy efficient than executing the original code. For a set of diverse applications, NPU acceleration provides whole-application speedup of 2.3× and energy savings of 3.0× on average with quality loss of at most 9.6%.
AbstractList This paper describes a learning-based approach to the acceleration of approximate programs. We describe the \emph{Parrot transformation}, a program transformation that selects and trains a neural network to mimic a region of imperative code. After the learning phase, the compiler replaces the original code with an invocation of a low-power accelerator called a \emph{neural processing unit} (NPU). The NPU is tightly coupled to the processor pipeline to accelerate small code regions. Since neural networks produce inherently approximate results, we define a programming model that allows programmers to identify approximable code regions -- code that can produce imprecise but acceptable results. Offloading approximable code regions to NPUs is faster and more energy efficient than executing the original code. For a set of diverse applications, NPU acceleration provides whole-application speedup of 2.3× and energy savings of 3.0× on average with quality loss of at most 9.6%.
Author Burger, D.
Sampson, A.
Ceze, L.
Esmaeilzadeh, H.
Author_xml – sequence: 1
  givenname: H.
  surname: Esmaeilzadeh
  fullname: Esmaeilzadeh, H.
  email: hadianeh@cs.washington.edu
– sequence: 2
  givenname: A.
  surname: Sampson
  fullname: Sampson, A.
  email: asampson@cs.washington.edu
– sequence: 3
  givenname: L.
  surname: Ceze
  fullname: Ceze, L.
  email: luisceze@cs.washington.edu
– sequence: 4
  givenname: D.
  surname: Burger
  fullname: Burger, D.
  email: dburger@microsoft.com
BookMark eNotjs1Kw0AURkeoYK1ZunKTF0icO_8X3ISgtVBtEV2XaXJHAmkSJino2xuoq4-zOIfvli26viPG7oHnABwf3zblxy4XHESu3BVL0DpuDWqFQrkFWwK3IlNKww1LxrE5cqm15tKqJXt6p3P0bVpUFbUU_dT0XRr6mK6pm7HN9uc49COlxTDE_qc5-YnSfey_oz-Nd-w6-Hak5H9X7Ovl-bN8zba79aYstpmXHKcs2EoFALAGKofKgwHrfRA1EdbeBdBoFOqjlVzp2gIKU3PPEX2lXG2NXLGHS7chosMQ5xfx9zA70iiQf2b8SY8
CODEN IEEPAD
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/MICRO.2012.48
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Xplore POP ALL
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
EISBN 9780769549248
9781467348195
0769549241
1467348198
EndPage 460
ExternalDocumentID 6493641
Genre orig-research
GroupedDBID -~X
123
29O
6IE
6IF
6IK
6IL
6IN
AAJGR
AAWTH
ADZIZ
AFFNX
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IPLJI
M43
OCL
RIE
RIL
RNS
ID FETCH-LOGICAL-a309t-f7c4f111761c894a1617aaf2dee9da8f1596495b73045d71926d0a099ac48d763
IEDL.DBID RIE
ISICitedReferencesCount 320
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000319333900039&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN 1072-4451
IngestDate Wed Aug 27 02:44:23 EDT 2025
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-a309t-f7c4f111761c894a1617aaf2dee9da8f1596495b73045d71926d0a099ac48d763
PageCount 12
ParticipantIDs ieee_primary_6493641
PublicationCentury 2000
PublicationDate 2012-12
PublicationDateYYYYMMDD 2012-12-01
PublicationDate_xml – month: 12
  year: 2012
  text: 2012-12
PublicationDecade 2010
PublicationTitle 2012 45th Annual IEEE/ACM International Symposium on Microarchitecture
PublicationTitleAbbrev micro
PublicationYear 2012
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssib035550374
ssj0001035055
ssj0008695
Score 2.434999
Snippet This paper describes a learning-based approach to the acceleration of approximate programs. We describe the \emph{Parrot transformation}, a program...
SourceID ieee
SourceType Publisher
StartPage 449
SubjectTerms Accelerator
Approximate Computing
Neural Networks
Neural Processing Unit
NPU
Title Neural Acceleration for General-Purpose Approximate Programs
URI https://ieeexplore.ieee.org/document/6493641
WOSCitedRecordID wos000319333900039&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEA61ePBUtRXf5ODR9JGmeYCXIhYPUouo9FayeUBBWmm34s93JrvtevDibdlDyM5k832TzHxDyA3vBXBrplnkKkCAIhyz2vaYt4AF0nd1TOVj709qPNbTqZnUyO2uFiaEkJLPQhsf012-X7oNHpV1pDB9iVXqe0rJolZru3YANgcopVKdr-CV2aCiwlqmDiwQ7XCGolyV3mYHvvflGbO8eBvbAP3qspJAZtT43_QOSauq1qOTHQ4dkVpYHJPGtl0DLf_eJrlDIQ77QYfOAdYUnqfAWWkpPc0mYPTlOtAh6ox_z4HLpoExf2vdIm-jh9f7R1Y2T2C23zU5i8qJCBuZkj2njbAYx1gbuQ_BeKsj0BiY7yBTeFXqFRA98IwFvmid0B52nRNSXywX4ZRQ4aQHqAMiKYyITmufZbFrYCjOTRbNGWmiMWafhT7GrLTD-d-vL8gBmrpICbkk9Xy1CVdk333l8_XqOjn1BxPkncA
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5KFfRUtRXf7sGj6SPN7ibgpYilYq1FqvRWsnlAQVrpQ_z5zuxuux68eFv2ELIz2XzfJDPfANzwlkO3JpJ5HjsMUIRhWuoWsxqxILJN6dPysfd-PBjI8VgNS3C7rYVxzqXJZ65Oj-ldvp2bNR2VNSKh2hFVqe-EQvBmVq21WT0InCGJqRQnLHRpFhZkWEZpDxaMdzgjWa5CcbOBX_z6QnlevE6NgH71WUlhplv53wQPoFbU6wXDLRIdQsnNjqCyadgQ5P9vFe5IikN_BB1jEG0y3wfIWoNcfJoN0ezzpQs6pDT-PUU2mw5MGVzLGrx1H0b3PZa3T2C63VQr5mMjPG5lcdQyUglNkYzWnlvnlNXSI5HB-YZJTJelNkaqh77RyBi1EdLivnMM5dl85k4gECayCHZIJYUS3khpk8Q3FQ7FuUq8OoUqGWPymSlkTHI7nP39-hr2eqPn_qT_OHg6h30ye5YgcgHl1WLtLmHXfK2my8VV6uAffcehBw
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2012+45th+Annual+IEEE%2FACM+International+Symposium+on+Microarchitecture&rft.atitle=Neural+Acceleration+for+General-Purpose+Approximate+Programs&rft.au=Esmaeilzadeh%2C+H.&rft.au=Sampson%2C+A.&rft.au=Ceze%2C+L.&rft.au=Burger%2C+D.&rft.date=2012-12-01&rft.pub=IEEE&rft.issn=1072-4451&rft.spage=449&rft.epage=460&rft_id=info:doi/10.1109%2FMICRO.2012.48&rft.externalDocID=6493641
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1072-4451&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1072-4451&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1072-4451&client=summon