FSPA: An FeFET-based Sparse Matrix-Dense Vector Multiplication Accelerator

Sparse matrix-dense vector multiplication (SpMV) is widely used in various applications. The performance of traditional SpMV accelerators is bounded by memory. In-memory computing (IMC) is a promising technique to alleviate the memory bottleneck. The current IMC accelerator cannot support sparse sto...

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Vydané v:	2023 60th ACM/IEEE Design Automation Conference (DAC) s. 1 - 6
Hlavní autori:	Zhang, Xiaoyu, Li, Zerun, Liu, Rui, Chen, Xiaoming, Han, Yinhe
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 09.07.2023
Predmet:	Design automation Electric breakdown FeFETs ferroelectric field-effect transistor Graphics processing units In-memory computing Sparse matrices Sparse matrix multiplication Transistors
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