Parallel Incomplete LU Factorization Based Iterative Solver for Fixed-Structure Linear Equations in Circuit Simulation

A series of fixed-structure sparse linear equations are solved in a circuit simulation process. We propose a parallel incomplete LU (ILU) preconditioned GMRES solver for those equations. A new subtree-based scheduling algorithm for ILU factorization and forward/backward substitution is adopted to ov...

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Vydáno v:	2023 28th Asia and South Pacific Design Automation Conference (ASP-DAC) s. 339 - 345
Hlavní autoři:	Li, Lingjie, Liu, Zhiqiang, Liu, Kan, Shen, Shan, Yu, Wenjian
Médium:	Konferenční příspěvek
Jazyk:	angličtina
Vydáno:	New York, NY, USA ACM 16.01.2023
Edice:	ACM Conferences
Témata:	Circuit simulation Computing methodologies Hardware Hardware > Electronic design automation Hardware > Electronic design automation > Physical design (EDA) Hardware > Hardware validation Hardware > Hardware validation > Functional verification Hardware > Hardware validation > Functional verification > Simulation and emulation Hardware > Integrated circuits Hardware > Integrated circuits > Logic circuits incomplete LU factorization Iterative algorithms iterative equation solver Mathematical models Matrices Nonlinear circuits parallel computing Scheduling Scheduling algorithms Theory of computation Theory of computation > Design and analysis of algorithms circuit simulation iterative equation solver parallel computing incomplete LU factorization
ISBN:	9781450397834, 1450397832
ISSN:	2153-697X
On-line přístup:	Získat plný text
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