THE FIRST HARDWARE MSC ALGORITHM IMPLEMENTATION

This paper describes the first attempt of hardware implementation of Multistream Compression (MSC) algorithm. The algorithm is transformed to series of Finite State Machines with Datapath using Register-Transfer methodology. Those state machines are then implemented in VHDL to selected FPGA platform...

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Bibliographic Details

Published in:	Neural Network World Vol. 27; no. 6; pp. 541 - 555
Main Authors:	Fábera, Vít, Musil, Tomáš, Rada, Jakub
Format:	Journal Article
Language:	English
Published:	Prague Institute of Information and Computer Technology 01.01.2017 Czech Technical University in Prague, Faculty of Transportation Sciences
Subjects:	Algorithms Computer memory Data structures Finite state machines Hardware Hardware description languages Neural networks Series (mathematics) left tree representation multistream compression MSC compression parallel compression FPGA
ISSN:	1210-0552, 2336-4335
Online Access:	Get full text
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