Multi-Layer In-Memory Processing

In-memory computing provides revolutionary changes to computer architecture by fusing memory and computation, allowing data-intensive computations to reduce data communications. Despite promising results of in-memory computing in each layer of the memory hierarchy, an integrated approach to a system...

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Bibliographic Details
Published in:	2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO) pp. 920 - 936
Main Authors:	Fujiki, Daichi, Khadem, Alireza, Mahlke, Scott, Das, Reetuparna
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.10.2022
Subjects:	accelerator Energy efficiency GNN Graph neural networks Graphics processing units In-memory computing Microarchitecture Performance evaluation processing in memory Processor scheduling
Online Access:	Get full text
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Summary:	In-memory computing provides revolutionary changes to computer architecture by fusing memory and computation, allowing data-intensive computations to reduce data communications. Despite promising results of in-memory computing in each layer of the memory hierarchy, an integrated approach to a system with multiple computable memories has not been examined. This paper presents a holistic and application-driven approach to building Multi-Layer In-Memory Processing (MLIMP) systems, enabling applications with variable computation demands to reap the benefits of heterogeneous compute resources in an integrated MLIMP system. By introducing concurrent task scheduling to MLIMP, we achieve improved performance and energy efficiency for graph neural networks and multiprogramming of data parallel applications.
DOI:	10.1109/MICRO56248.2022.00068