MBAPIS: Multi-Level Behavior Analysis Guided Program Interval Selection for Microarchitecture Studies

Understanding program behavior is crucial in computer architecture research, but the growing size of benchmarks makes analyzing and simulating entire programs increasingly challenging. In practice, researchers often select representative program intervals for analysis and testing. These intervals ar...

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Veröffentlicht in:2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT) S. 297 - 308
Hauptverfasser: Cui, Hongwei, Cui, Yujie, Zhan, Honglan, Liang, Shuhao, Liu, Xianhua, Yang, Chun, Cheng, Xu
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 21.10.2023
Schlagworte:
Behavioral sciences
Benchmark
Benchmark testing
checkpoint
Error analysis
Focusing
Hardware
Microarchitecture
open-source hardware
program behavior
program interval
Software
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Zusammenfassung:Understanding program behavior is crucial in computer architecture research, but the growing size of benchmarks makes analyzing and simulating entire programs increasingly challenging. In practice, researchers often select representative program intervals for analysis and testing. These intervals are different sections of continuous execution of a program. SimPoint is a well-known method for selecting representative intervals using hardware-independent information. However, when focusing on a specific microarchitecture study, it is desirable to select intervals that are more relevant to that study. For instance, intervals with more branch mispredictions are more appropriate for branch prediction studies. We refer to these intervals as "tailored intervals" for branch prediction studies. This paper presents a Multi-level Behavior Analysis guided Program Interval Selection (MBAPIS) for selecting tailored intervals. For a given microarchitecture study, the first level of MBAPIS uses hardware performance counters to prioritize selecting the intervals that exhibit clearer microarchitectural characteristics relevant to that study. The second level analyzes the processor performance bottlenecks to further select the intervals where the concerned microarchitecture design more strongly impacts performance. Finally, MBAPIS performs clustering analysis with the basic block information of each interval selected by the first two levels, and selects the representative intervals among them while preserving the diverse software behavior. Additionally, we present a general and extensible interval-replaying design to accurately re-execute selected intervals. The SPEC CPU2006 and CPU2017 benchmarks are used for evaluation. The results demonstrate that MBAPIS can select representative and tailored intervals for two typical microarchi-tecture studies and deliver accurate estimates of the concerned hardware events for all tailored intervals in each benchmark, with an average error rate of less than 1.5%. Moreover, the interval-replaying design effectively restores the hardware behavior of the intervals selected by MBAPIS, with an average relative error rate of annroximately 1.4%.
DOI:10.1109/PACT58117.2023.00032