Vector Extensions for Decision Support DBMS Acceleration

Database management systems (DBMS) have become an essential tool for industry and research and are often a significant component of data centres. As a result of this criticality, efficient execution of DBMS engines has become an important area of investigation. This work takes a top-down approach to...

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Veröffentlicht in:2012 45th Annual IEEE/ACM International Symposium on Microarchitecture S. 166 - 176
Hauptverfasser: Hayes, T., Palomar, O., Unsal, O., Cristal, A., Valero, M.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 01.12.2012
Schlagworte:
dbms
decision
dlp
microarchitecture
parallelism
simd
support
vector
ISSN:1072-4451
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Zusammenfassung:Database management systems (DBMS) have become an essential tool for industry and research and are often a significant component of data centres. As a result of this criticality, efficient execution of DBMS engines has become an important area of investigation. This work takes a top-down approach to accelerating decision support systems (DSS) on x86-64 microprocessors using vector ISA extensions. In the first step, a leading DSS DBMS is analysed for potential data-level parallelism. We discuss why the existing multimedia SIMD extensions (SSE/AVX) are not suitable for capturing this parallelism and propose a complementary instruction set reminiscent of classical vector architectures. The instruction set is implemented using unintrusive modifications to a modern x86-64 micro architecture tailored for DSS DBMS. The ISA and micro architecture are evaluated using a cycle-accurate x86-64 micro architectural simulator coupled with a highly-detailed memory simulator. We have found a single operator is responsible for 41% of total execution time for the TPC-H DSS benchmark. Our results show performance speedups between 1.94x and 4.56x for an implementation of this operator run with our proposed hardware modifications.
ISSN:1072-4451
DOI:10.1109/MICRO.2012.24