Reliable In-Memory Neuromorphic Computing Using Spintronics
Recently Spin Transfer Torque Random Access Memory (STT-MRAM) technology has drawn a lot of attention for the direct implementation of neural networks, because it offers several advantages such as near-zero leakage, high endurance, good scalability, small foot print and CMOS compatibility. The stori...
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| Veröffentlicht in: | 2019 24th Asia and South Pacific Design Automation Conference (ASP-DAC) S. 1 - 7 |
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21.01.2019
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| ISSN: | 2153-697X |
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| Abstract | Recently Spin Transfer Torque Random Access Memory (STT-MRAM) technology has drawn a lot of attention for the direct implementation of neural networks, because it offers several advantages such as near-zero leakage, high endurance, good scalability, small foot print and CMOS compatibility. The storing device in this technology, the Magnetic Tunnel Junction (MTJ), is developed using magnetic layers that requires new fabrication materials and processes. Due to complexities of fabrication steps and materials, MTJ cells are subject to various failure mechanisms. As a consequence, the functionality of the neuromorphic computing architecture based on this technology is severely affected. In this paper, we have developed a framework to analyze the functional capability of the neural network inference in the presence of the several MTJ defects. Using this framework, we have demonstrated the required memory array size that is necessary to tolerate the given amount of defects and how to actively decrease this overhead by disabling parts of the network. |
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| AbstractList | Recently Spin Transfer Torque Random Access Memory (STT-MRAM) technology has drawn a lot of attention for the direct implementation of neural networks, because it offers several advantages such as near-zero leakage, high endurance, good scalability, small foot print and CMOS compatibility. The storing device in this technology, the Magnetic Tunnel Junction (MTJ), is developed using magnetic layers that requires new fabrication materials and processes. Due to complexities of fabrication steps and materials, MTJ cells are subject to various failure mechanisms. As a consequence, the functionality of the neuromorphic computing architecture based on this technology is severely affected. In this paper, we have developed a framework to analyze the functional capability of the neural network inference in the presence of the several MTJ defects. Using this framework, we have demonstrated the required memory array size that is necessary to tolerate the given amount of defects and how to actively decrease this overhead by disabling parts of the network. |
| Author | Bishnoi, Rajendra Tahoori, Mehdi B. Munch, Christopher |
| Author_xml | – sequence: 1 givenname: Christopher surname: Munch fullname: Munch, Christopher email: christopher.muench@kit.edu organization: Karlsruhe Institute of Technology (KIT),Chair of Dependable Nano Computing (CDNC),Karlsruhe,Germany – sequence: 2 givenname: Rajendra surname: Bishnoi fullname: Bishnoi, Rajendra email: rajendra.bishnoi@kit.edu organization: Karlsruhe Institute of Technology (KIT),Chair of Dependable Nano Computing (CDNC),Karlsruhe,Germany – sequence: 3 givenname: Mehdi B. surname: Tahoori fullname: Tahoori, Mehdi B. email: mehdi.tahoori@kit.edu organization: Karlsruhe Institute of Technology (KIT),Chair of Dependable Nano Computing (CDNC),Karlsruhe,Germany |
| BookMark | eNotj0tLw1AUhK-iYFu7duMifyD13OfJxZUEq4WqoBbclZv0HL2SF0m76L83orOYb5jFwEzFWdM2JMSVhIWUxt5olaFTZjEyQ2NPxHRsQTsAdKdioqTVqfP4cSHmw_ANoywolDARt69UxVBUlKya9Inqtj8mz3To2zF1X7FM8rbuDvvYfCab4dffutjs-7aJ5XApzjlUA83_OROb5f17_piuXx5W-d06DQrdPiWwXJSgWO6cM8hs0KvApqTSOrPTnjmogllmGtgFr5gQpSdlJGYOvJ6J67_dSETbro916I9bOX4AY1H_AN1xSWE |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1145/3287624.3288745 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering Computer Science |
| EISBN | 1450360076 9781450360074 |
| EISSN | 2153-697X |
| EndPage | 7 |
| ExternalDocumentID | 10500457 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL ACM ALMA_UNASSIGNED_HOLDINGS APO CBEJK GUFHI LHSKQ RIE RIL |
| ID | FETCH-LOGICAL-a276t-e05fbc02f1d6647ff4792af4cec564d39ffa2bff1830f6a92fe7719e241786093 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 12 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000507459700045&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Wed Aug 27 02:10:38 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-a276t-e05fbc02f1d6647ff4792af4cec564d39ffa2bff1830f6a92fe7719e241786093 |
| PageCount | 7 |
| ParticipantIDs | ieee_primary_10500457 |
| PublicationCentury | 2000 |
| PublicationDate | 2019-Jan.-21 |
| PublicationDateYYYYMMDD | 2019-01-21 |
| PublicationDate_xml | – month: 01 year: 2019 text: 2019-Jan.-21 day: 21 |
| PublicationDecade | 2010 |
| PublicationTitle | 2019 24th Asia and South Pacific Design Automation Conference (ASP-DAC) |
| PublicationTitleAbbrev | ASP-DAC |
| PublicationYear | 2019 |
| Publisher | ACM |
| Publisher_xml | – name: ACM |
| SSID | ssj0000502710 ssj0002869603 |
| Score | 1.768837 |
| Snippet | Recently Spin Transfer Torque Random Access Memory (STT-MRAM) technology has drawn a lot of attention for the direct implementation of neural networks, because... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 1 |
| SubjectTerms | Biological neural networks defect modeling Fabrication MTJ neuromorphic computing Neuromorphic engineering Neurons Redundancy Scalability Torque |
| Title | Reliable In-Memory Neuromorphic Computing Using Spintronics |
| URI | https://ieeexplore.ieee.org/document/10500457 |
| WOSCitedRecordID | wos000507459700045&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwED3RigGWQiniWx5YXRLHsRMxIioYqCoBUrfKcXyiDGnVDyT-PWcnLTAwMMVKLCs6-3Qvl3fvAK5pnzMkqEyH12lOh0JwY9OCKyUx8-qbhTKh2YQeDrPxOB81xeqhFsY5F8hnru-H4V9-ObNrnyojD089BNEtaGmt62KtbUKFngndxLL3kDVShM6TRs4nlulNIrzryz5dvcj7r34qIZwMOv98kQPofRfmsdE25BzCjqu60Nl0ZmCNo3Zh_4fM4BHcet6xL5FijxV_8tTaTxZEOWg0f5taVi9Ac1lgELDn-bSqe-Mse_A6uH-5e-BN0wRuhFYr7qIUCxsJjEuyt0aUOhcGpXU2VbJMckQjCkRy5QiVyQU6rePcUSTXmYry5Bja1axyJ8AKlWlrYvrIkYRb0GRFEcWYYlRalBipU-h500zmtS7GZGOVsz_un8MewQ1Pz-IivoD2arF2l7BrP1bT5eIq7OYXt0aeMw |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV09T8MwED1BQQKWQiniGw-sLonj2IkYEagVbVWJInWrHMcnypBW_UDi32M7aYGBgSlWYlnR2ad7ubx7B3Br9zlBC5Xt4TWS2kPBqNJxRoXgmDj1zUwo32xC9vvJaJQOqmJ1XwtjjPHkM9NyQ_8vP5_qlUuVWQ-PHQSR27ATc87Cslxrk1KxT5msotm7zxsJi8-jStAn5PFdxJzz85a9Opn3Xx1VfEB5qv_zVQ6h-V2aRwaboHMEW6ZoQH3dm4FUrtqAgx9Cg8dw75jHrkiKdArac-TaT-JlOexo9jbRpFzAziWeQ0BeZpOi7I6zaMLr0-PwoU2rtglUMSmW1AQxZjpgGObW4hKRy5Qp5NroWPA8ShEVyxCtMwcoVMrQSBmmxsZymYggjU6gVkwLcwokE4nUKrSfOdwiF1RJlgUhxhjkGjkG4gyazjTjWamMMV5b5fyP-zew1x72uuNup_98AfsWfDiyFmXhJdSW85W5gl39sZws5td-Z78AIwOheg |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=proceeding&rft.title=2019+24th+Asia+and+South+Pacific+Design+Automation+Conference+%28ASP-DAC%29&rft.atitle=Reliable+In-Memory+Neuromorphic+Computing+Using+Spintronics&rft.au=Munch%2C+Christopher&rft.au=Bishnoi%2C+Rajendra&rft.au=Tahoori%2C+Mehdi+B.&rft.date=2019-01-21&rft.pub=ACM&rft.eissn=2153-697X&rft.spage=1&rft.epage=7&rft_id=info:doi/10.1145%2F3287624.3288745&rft.externalDocID=10500457 |